(sorry for the title, but I don't know how to say "nombre à virgule" in English, and Google Translation didn't give me any better ^^).

So, for starters, hello!
How do I write comma numbers in FASM?
I've been trying that:

But, no surprises, it didn't work. Do you have any idea?

What do you mean by "didn't work".

The line of code above assembles fine. It produces the closest possible approximation of 97/100 in the single precision floating point format.

Well, when I try to perform a mathematical operation (in this case imul), it refers to value that I don't expect. Like, for example:



Well, that's basically it. (because my code is longer).

@rugxulo: I didn't quite understand your answer

Float multiply by constant:

Good joke, Mino.
Integer & float datas coded differently.
So, for correct interpretation of thour data thou shold use integer instructions for extracting integer operands, or use float instructions for extract float operands.

There are a few ways to represent numbers with fractional parts, the one you were using was single precision.

So, at the 'nmbr' label, or in eax, the bits are stored as binary scientific notation, more or less. The encoding is pretty standard (I think there can be some variations though), but the IEEE standard for single precision looks like this:

https://en.wikipedia.org/wiki/Single-precision_floating-point_format

which processors can handle pretty efficiently. I think one of the earlier single precision formats was used or invented by Konrad Zuse.

Other "nombre à virgule" formats include binary coded decimal, which can be useful when exact numbers are needed (relational databases have the same type of format).

So, when you are working with integers only, the register will not need the binary exponential format, but probably work on a two's-complement format:

https://en.wikipedia.org/wiki/Two%27s_complement

depending on what you are using the register for. I think add, imul, etc use two's complement. The AMD/intel instruction manuals should be able to confirm.

Also, I think it is more recommended to use non-FPU registers when available, so performanig math operations on floating point numbers can be achieved with SSE/avx/etc instructions on the xmm/ymm/zmm registers (depending on what you have). I saw you were using eax and dd, so not sure if you have an older 32-bit architecture that only supports mmx.

I think fasm will define single precision or double precision for you, when you supply immediates as you have. Since single precision is a 32-bit format, dd should encode that, dq should encode 64-bit (double precision).

A useful SSE instruction is cvtsi2ss and its variants. These are listed in the AMD docs and lets the processor convert between integers and floating point formats.

Sorry for the lengthy response, but think I convered some of the topics you brought up. I can provide some small usage examples if needed.

Well, I don't understand what "nombre à virgule" means. You also said "comma numbers" and used "0.97" (which is not a comma, at least in U.S.).



I thought you just meant separating numeric literals for better readability, but apparently you want floating point stuff. Fun!

@rugxulo: Sorry, in French, we have another name for floats. And translated "literally", that gives a "comma number" (because FR use ',' as comma in float → 0,97 = 0.97).
@donn: Thank's for informations
@ProMiNick: I don't understand very well "my" joke, but thanks also for informations
@CandyMan: It's clearer now, thank you