flat assembler
Message board for the users of flat assembler.
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system error 03 Sep 2017, 07:49
Furs wrote:
Of course, he's a beginner. Many times, a beginner doesn't even know the correct /valid questions to ask.. You need to apply some common sense. So use your brain when attending to beginners questions. Not with your "expert attitude". Got it? |
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03 Sep 2017, 07:49 |
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system error 03 Sep 2017, 07:54
revolution wrote:
It is true in High-level language. But in Assembly language, syntax rules cater to both machine rules and symbolic rules. add eax,bx ==> violates machine rules "operands must be of same size" addy eax,ebx ==> violates symbolic rules. "invalid instruction" |
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03 Sep 2017, 07:54 |
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Furs 03 Sep 2017, 11:56
system error wrote: Of course, he's a beginner. Many times, a beginner doesn't even know the correct /valid questions to ask.. You need to apply some common sense. |
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03 Sep 2017, 11:56 |
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system error 03 Sep 2017, 13:20
Furs wrote:
No "master of everything". Look at his second response. Quote: It requires space from the CPU Register's memory or from the RAM ? Does this sound like an advanced question to you? No. This is genuine kind of beginners questions and that is just natural. There's no need for a rocket scientist opinion to figure that out. The problem is with YOUR "expert garbage" attitude, extending your garbage to the moon and pluto kind of explanations. But funny how that attitude got knocked out cold when dealing with some advanced programmers. hahahaha xD |
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03 Sep 2017, 13:20 |
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Furs 03 Sep 2017, 13:26
Nope. The guy clearly thinks that a CPU can execute any sort of operation and it's not bound by implementation and opcodes. Like in HLLs where you can add 16-bit number to 32-bit since there are no opcodes there.
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03 Sep 2017, 13:26 |
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system error 03 Sep 2017, 13:50
Furs wrote: Nope. The guy clearly thinks that a CPU can execute any sort of operation and it's not bound by implementation and opcodes. Like in HLLs where you can add 16-bit number to 32-bit since there are no opcodes there. Nope too. The simplest explanation is "operands sizes are not equal". Simple, Assembler-friendly, beginners-friendly response. The most appropriate, shortest and cleanest response you can give to any beginners. No need to extend the BS to instruction opcodes, instruction length, instruction prefixes and complex memory addressing modes. Got it? |
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03 Sep 2017, 13:50 |
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Furs 03 Sep 2017, 13:51
system error wrote: The simplest explanation is "operands sizes are not equal". |
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03 Sep 2017, 13:51 |
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system error 03 Sep 2017, 14:10
Furs wrote:
Not necessarily. A beginner may not even notice what and where the error message is especially when he's on command-line interface. The fact that your explanation draws another clueless and unrelated question from him is evident that he's still confused with your explanation about "instruction length". I came to your rescue and he then thanked all of us for such a beautiful and compact explanation I gave. Unfortunately, your mistake was when you quoted my posts without thinking about the risks! Are you out of your mind?? Now you're in BIG TROUBLE!! hahahaha xD |
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03 Sep 2017, 14:10 |
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Furs 03 Sep 2017, 14:49
system error wrote: especially when he's on command-line interface. Code: flat assembler version 1.71.64 (1310719 kilobytes memory) test.asm [2]: add eax, bx processed: add eax,bx error: operand sizes do not match. C:\> |
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03 Sep 2017, 14:49 |
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system error 03 Sep 2017, 15:01
Furs wrote:
And how's your explanation about SPACE SAVING OPCODE be any help to clear the air of his confusions? See his second posts? "Register's "memory or RAM"?!! That's the result of UNNECESSARY CONFUSIONS that you've got himself into! If it wasn't because of me, that poor guy would have ditched asm programming altogether after reading your "expert" explanation on INSTRUCTION GROUPINGS TABLE and XOP instruction prefixes! WTF is wrong with you? |
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03 Sep 2017, 15:01 |
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Furs 03 Sep 2017, 16:54
So what would repeating the error message do if he doesn't know what an operand is? But anyway, it's still your assumption, until he comes and says something about it, he still asked about the operation. So yeah, that's your opinion, as I said (and you went apeshit).
Nobody said anything about "space saving" opcodes, I don't even know what that means. I said "opcode space", which is what they assign to each opcode (also called "opcode map"). You have only 255 values in a byte, and each insn type requires one. 255 is a finite number of stuff you can fit in there, why waste it on such operations etc was what I meant. In fact, movzx/movsx already deal with the extended (2 byte without operands or Mod R/M) opcode space, because the 255 values were already exhausted. |
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03 Sep 2017, 16:54 |
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revolution 03 Sep 2017, 16:57
2^8 = 256
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03 Sep 2017, 16:57 |
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Furs 03 Sep 2017, 17:02
Well I put aside 1 opcode for the extension (in x86, 0x0F) of the opcode space. Otherwise you'd be stuck.
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03 Sep 2017, 17:02 |
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system error 05 Sep 2017, 11:25
Furs wrote: But anyway, it's still your assumption, No. It's all about your "expert" attitude that FORCED him to ask "register's memory or RAM" in his 2nd post when you went moutfhul about "opcode space". Opcode space WHAT??? WTF is opcode space? You just made it up to make you look like an "expert", didn't you? xD |
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05 Sep 2017, 11:25 |
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revolution 05 Sep 2017, 11:49
system error wrote: No. It's all about your "expert" attitude that FORCED him to ask "register's memory or RAM" in his 2nd post when you went moutfhul about "opcode space". There is no harm if you supply more information that what is asked for. People can choose to ignore it if that don't care about it or don't understand it. It also allows them to ask follow-up questions and learn something they would otherwise might not have known to ask about. But at the end of the day, simply trying to help is enough to encourage people to ask more and learn more. Even if it is pitched too high the first time around, people appreciate the effort and will feel comfortable clarifying their query further and learning things in the process. |
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05 Sep 2017, 11:49 |
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system error 05 Sep 2017, 11:56
revolution wrote:
You're offering nothing useful in this post I am quoting. Still mad, broh? xD |
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05 Sep 2017, 11:56 |
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Furs 05 Sep 2017, 18:44
system error wrote: Opcode space WHAT??? WTF is opcode space? First result: https://en.wikipedia.org/wiki/VEX_prefix Wikipedia wrote: Five bits named m. Two of the m bits are used for replacing existing escape codes and for specifying the length of the instruction. The remaining three m bits are reserved for future use, such as specifying vector lengths >256 bits, specifying different instruction lengths, or extending the opcode space, however as of 2013, Intel decided to introduce a new encoding scheme, the EVEX prefix, rather than expand the remaining m bits. Margaret Bloom wrote: Before the opcode space was exhausted [...] |
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05 Sep 2017, 18:44 |
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system error 05 Sep 2017, 19:50
Furs wrote:
I created my own disassembler and instruction length engine. You don't have to sell your GARBAGE to me about instructions prefixes. I know ALL ABOUT instruction prefixes like the back of my hand xD And no. There's no "opcode space" defined in the official Intel/AMD Manual. Even if they exist, they are just common phrases not amounting to any technical terminologies. So don't push your luck. You'll find yourself in irreversible humiliation in one of these days if you really want to come down to such technical details! Opcode Space, my ass! HAHAHAHA xD |
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05 Sep 2017, 19:50 |
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Furs 05 Sep 2017, 21:45
You obviously haven't or just copy pasted it, and I have a fairly good idea myself based on your behavior But considering you don't even know what opcode space/map is, it's hilarious. And yes it was officially the reason Intel gave when designing the x87 (very long ago).
Heck, even wikipedia says it: https://en.wikipedia.org/wiki/X86#Floating_point_unit Wikipedia wrote: Each x87 register, known as ST(0) through ST(7), is 80 bits wide and stores numbers in the IEEE floating-point standard double extended precision format. These registers are organized as a stack with ST(0) as the top. This was done in order to conserve opcode space, and the registers are therefore randomly accessible only for either operand in a register-to-register instruction; ST0 must always be one of the two operands, either the source or the destination, regardless of whether the other operand is ST(x) or a memory operand. However, random access to the stack registers can be obtained through an instruction which exchanges any specified ST(x) with ST(0) |
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05 Sep 2017, 21:45 |
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