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Index > Compiler Internals > lea bug?

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h4ng4m3



Joined: 25 Jun 2003
Posts: 21
h4ng4m3
Code:
work:
lea ebp, [esp+ebp+14]

but below lea does not compile:
 
 lea ebp, [ebp+esp+14]    
Post 07 Aug 2004, 08:10
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scientica
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Joined: 16 Jun 2003
Posts: 689
Location: Linköping, Sweden
scientica
hmm, I test it too now:
Code:
[15:07:40 frekla@ns1 tmp]$ cat > testc
[15:07:55 frekla@ns1 tmp]$ fasm  testc testoat > testc
flat assembler  version 1.54
1 passes, 6 bytes.
[15:08:05 frekla@ns1 tmp]$ cat > testc2
[15:08:23 frekla@ns1 tmp]$ fasm  testc2 testo
flat assembler  version 1.54
testc2 [1]:
lea ebp, [ebp+esp+14]
error: invalid address.
[15:08:27 frekla@ns1 tmp]$     

maybe it's related to opcode encoding? (eg, the "base reg" can't be the same as the "destination reg") -- haven't checked the opcode ref now.
Post 07 Aug 2004, 13:11
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Frank



Joined: 17 Jun 2003
Posts: 100
Frank
Quote:
The ESP register cannot be used as an index register.

Source: IA-32 Intel Architecture Software Developer's Manual Volume 1: Basic Architecture, p. 70 (or, in their notation, 3-20)
Post 07 Aug 2004, 16:06
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Betov



Joined: 17 Jun 2003
Posts: 98
Betov
After having read this thread, i took a look at the way RosAsm does it. Same problem, here. I just solved it by exchanging the two Registers, when wishable. I don't know how it is in FASM syntax, but, in RosAsm one, we can as well have the Base first or second (and Index second or first), so it seemed to me logical to enable both ways for that case, as well. Just a special condition to be added for SIB with two different Regs with no Scale, and one of the regs being esp...


Betov.
Post 07 Aug 2004, 19:30
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JohnFound



Joined: 16 Jun 2003
Posts: 3500
Location: Bulgaria
JohnFound
Yes, FASM allows exchange index and base registers - it is equal to write
[esi+4*edi] or [4*edi+esi]. But in the case of esp, there is special case, so I think it can be considered as "minor bug" and probably Privalov will fix it very quick.

Regards.
Post 07 Aug 2004, 20:30
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Betov



Joined: 17 Jun 2003
Posts: 98
Betov
Oh, i wouldn't even say "a minor bug" Wink This just requires a special case consideration for full flexibility... well...


Betov.
Post 07 Aug 2004, 21:04
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Octavio



Joined: 21 Jun 2003
Posts: 366
Location: Spain
Octavio
The problem is that [esp+ebx] uses by default stack segment
while [ebx+esp] is suposed to use data segment.
if fasm swap registers the programmer could think erroneously that he is
using data segment instead of stack segment.
Of course, for flat memory model this is not important but fasm is a generic assembler. Only [ebp+esp] can be exchanged because both registers use stack segment by default, but i don´t consider this a bug,
and some times is better than the assembler shows to the programmer
that this instruction does not exist instead of arrange the code.
Post 07 Aug 2004, 21:05
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pelaillo
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Joined: 19 Jun 2003
Posts: 878
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pelaillo
I agree with Octavio's point of view.
Post 07 Aug 2004, 21:25
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scientica
Retired moderator


Joined: 16 Jun 2003
Posts: 689
Location: Linköping, Sweden
scientica
I agree with Ocatvio, privalov better document ths feature Smile
Post 07 Aug 2004, 22:24
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Betov



Joined: 17 Jun 2003
Posts: 98
Betov
Oh, Yes.


Betov.
Post 08 Aug 2004, 08:33
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h4ng4m3



Joined: 25 Jun 2003
Posts: 21
h4ng4m3
[quote="Betov"]Oh, Yes.
quote]
M3 too Laughing
Post 08 Aug 2004, 09:34
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