How exactly I can make timing diagrams (Address, Data, WE, OE, WR, RD, M/IO/BHE etc) about some code of assembler? What's the order? For example, for this code :




OR THIS

For the older processors till 80386 (maybe even 80486) there is a fixed execution time per instruction. For the more modern Pentium and up the results are more or less unpredictable. This depends on the queue length, instruction units, cores, cache, the code itself and maybe a few things more.

I think the execution of instructions can be swapped internal either - but not sure if this is realized in hardware or only through software (compilers). But I assume, that this is optimized by the cpu itself as well.

In modern OoO architectures the internal instruction execution will have only a vague correlation with the external bus activity.

However for instructions like OUT and IN it may be possible to generate timing diagrams for the I/O bus that directly correlate to the internal instruction stream.