Hi,
I've got out of ideas here, but I've been thinking of implementing a relocatable format for my Virtual machine. It's a RISC machine, and therefore the instructions are very simple.
I've used FASM with macros as the assembler for my Virtual Machine. Right now my format looks like this: https://github.com/Benderx2/FVM/blob/master/include/fvm/fv11/fv11.h
I'm confused as to how implement such a format.
How is this exactly done? How do other formats implement it?
For example I could think of implementing something like this:

But this method is very space consuming and is senseless, in my VM Opcode's are 4-bytes, and hence I'm looking for a way to reduce instructions. (The VM is quite capable BTW, so anything can be done, from memory, I/O, calculating pi , sin x, cos x and whatnot)
Ideas?

ISAs that support this usually use relative addressing (in x86-64 this is known as RIP-relative addressing) i.e. there is an implicit use of the current code location for all code/data references and for absolute addresses you use a special instruction.

e.g. data page at 0x1000 code page at 0x2000, current instruction at 0x2001 reads data at address 0x1005 the instruction would encode load reg,(0x1005-0x2001) -> load reg,0xF004; the expansion done by the decoder would be 0xF004+0x2001=0x1005. Note the immediate is signed and must be sign extended to the full address range to recover the original value. If you move the code image around so that the data was at 0x7000 and code at 0x8000 then the code would still work since the [relative] difference has been maintained.

In the most common situations instructions which can access program counter register are used to implement PIC. In this case code reads address of current instruction and calculates data or function address using it.






There is also an interesting PIC implementation in the ELF for MIPS architecture. According to procedure call standard position independent code should load a function address to the t9 register before calling it, so callee can calculate address of any varriable or function by adding its offset to the content of t9 register.