flat assembler
Message board for the users of flat assembler.
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jorom
Hello!
fasm 1.70 not compiled Code: mov seg_reg,reg32 why? older versions of fasm compile properly (fasm 1.48 for example) _________________ sorry for my english |
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baldr
jorom,
Probably because segment register is 16-bit-wide? |
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Tomasz Grysztar
When you reverse the direction, there really are two different instructions:
Code: mov ax,cs ; doesn't clear upper bits mov eax,cs ; clears upper bits But when you move into the segment register, there is only one instruction, prefix doesn't matter. In this case fasm requires that you specify the actual data (16-bit register) that is used and no prefix is generated, no matter what mode you use. |
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MazeGen
I know this is a very minor issue but fasm behaves inconsistently here. MOV Sreg, gpr16 is actually assembled to MOV Sreg, grp32; MOV Sreg, gpr32 can't be assembled.
(Yes, as for the unmatching operand sizes the manual mentions only MOV Sreg, r/m64 so I assume the MOV Sreg, r/m32 is missing unintentionally) |
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Tomasz Grysztar
MazeGen wrote: I know this is a very minor issue but fasm behaves inconsistently here. MOV Sreg, gpr16 is actually assembled to MOV Sreg, grp32; MOV Sreg, gpr32 can't be assembled. |
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MazeGen
Intel Instruction Set Reference, A-Z (325383-044US, August 2012) has MOV Sreg, r/m64 instruction, described as "Move lower 16 bits of r/m64 to segment register." The source gpr32 operand is mentioned below in the Description chapter, and IIRC it was always there.
I'm not saying fasm should strictly follow Intel syntax, however, we can't say there is no such instruction as "MOV Sreg, gpr32" when we can find it in the manual ![]() |
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Tomasz Grysztar
The main reason why syntax rules for the complete instruction set are documented in fasm's manual is that fasm's syntax does not always follow the rules from Intel or AMD manuals. With later instruction sets I sometimes give up and do not reinvent syntax to clear up the inconsistencies, but with the original 80386 instruction set I did some tweaking. For me there is no "MOV Sreg, gpr32" instruction, because you do not use the 32-bit register there (since, obviously, this data would not fit in destination), you use only 16-bit one, and this is what the instruction syntax should state.
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