If I have an expression such as



How is this [arr+eax*4] translated by fasm? a "mul" instruction is generated to get computed address or something like this?

Thanks in advance.

The processor has actually support for such addressing: http://en.wikipedia.org/wiki/X86#Addressing_modes

Note however that fasm may sometimes perform some algebraic manipulation to either make your expression fit into one of the addressing modes (like transforming eax*5 to eax+eax*4), or re-order the terms to use a shorter addressing mode.

LocoDelAssembly, thanks very much.

Bob++

Always look into debugger for generated code:
That is what OllyDbg gives ('arr' is located at address 401120):

Yeah, check out the sib byte addressing in x86.

You can do complex this like ebp+reg+reg*base2 or ebp+reg*base2+imm32