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Index > OS Construction > E820 Map

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TightCoderEx



Joined: 14 Feb 2013
Posts: 58
Location: Alberta
TightCoderEx 20 Jul 2013, 16:57
Purpose is to build a map at the top of first 64K (1000H), decending order, growing downward and each entry 32 bytes. Padding is for easy visualization in Bochs and less complexity moving segment to next iteration, or back.
Code:
        mov     ax, es
        dec     ax
        dec     ax
        mov     es, ax                  ; Bump segment back 32 bytes    
or
Code:
        push     es
        add     word [esp], 2
        pop      es    

Due to lack of any comprehensive documention, I fashioned my algo somewhat after this wiki example and Pure64 code.

Out of curiosity sake, does anyone have the answers to the following;

1: Why does EDX need "SMAP", when it should be obvious what is required by calling routine with E820 in EAX.

2. You would think the callee be designed in such a way that if EAX <> EDX or EBX = 0 on first interation, CF would be set and if so EAX would have an error code.
Code:
        call    GetMapEntry
        jc      .Error
        cmp     eax, edx                ; Was magic returned in EAX?
        jnz     .Error
        test    ebx, ebx
        jnz     @F    

Similarly this. Of what value is an entry that doesn't have a size. You would think startup probing memory would eliminate this possibility.
Code:
   @@:  mov     eax, [es:8]
        or      eax, [es:12]            ; ZF=1 if entry has null length
        jz      .Skip    

Two more functions and then I can get into protected or long mode and put this BIOS crap behind me. Evil or Very Mad


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Post 20 Jul 2013, 16:57
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cod3b453



Joined: 25 Aug 2004
Posts: 618
cod3b453 20 Jul 2013, 21:31
It is likely that some BIOSs had a handler for ah=0xE8 int 0x15 but no check on al, so another discriminator is needed to prevent conflicts. For whatever reason "SMAP" was chosen (low chance of working anywhere else) so it just stayed that way.

I've never seen a zero length entry but it is possible that for the newer ACPI3 entries which return invalid/bad regions, it will zero the size for backward compatibility if using the old structure size. No doubt there is also another legacy reasons for it as well.

As you have no doubt learned the hard way, the BIOS is a nasty mess Laughing
Post 20 Jul 2013, 21:31
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