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> Main > who are these registers? And complete Intel registers list |
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yoshimitsu 02 Dec 2012, 19:10
These are x64 registers. They are available on any x86-64 cpu and encoded with a rex-prefix, just like rax, rcx, rdx, rbx, etc.
spl-dil are the 8 bit parts of rsp-rdi. r8-r15 are whole new 64 bit registers with rXXd being their dword-part, rXXw their word-part and rXXl/rXXb their byte-part. rax - eax - ax - al r8 - r8d - r8w - r8l/r8b You can use them just like any other register. On Windows, however, r12-r15 have to be preserved, just like rbx, rsi and rdi. |
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02 Dec 2012, 19:10 |
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Teehee 02 Dec 2012, 20:27
Quote:
wah? in 64mode i can get the 8bit part of esp? D: |
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02 Dec 2012, 20:27 |
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Teehee 02 Dec 2012, 21:21
can anyone tell me if i am missing some register? (excluding registers i can't use directly - EIP, EFLAGS, ..)
Code: 8 16 32 64 128 ah al ax eax rax xmm0 bh bl bx ebx rbx xmm1 ch cl cx ecx rcx xmm2 dh dl dx edx rdx xmm3 dil di edi rdi xmm4 sil si esi rsi xmm5 bpl bp ebp rbp xmm6 spl sp esp rsp xmm7 r8l r8w r8d r8 xmm8 r9l r9w r9d r9 xmm9 r10l r10w r10d r10 xmm10 r11l r11w r11d r11 xmm11 r12l r12w r12d r12 xmm12 r13l r13w r13d r13 xmm13 r14l r14w r14d r14 xmm14 r15l r15w r15d r15 xmm15 cs cr0 mm0 ds cr2 mm1 es cr3 mm2 fs cr4 mm3 gs cr8 mm4 ss dr0 mm5 dr1 mm6 dr2 mm7 dr3 st0 dr6 st1 dr7 st2 st3 st4 st5 st6 st7 _________________ Sorry if bad english. |
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02 Dec 2012, 21:21 |
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baldr 02 Dec 2012, 22:03
Teehee,
FPU stack registers actually are 80 bits wide. Model-specific registers and TSC can augment your list quite a lot, along with YMMx. rip can be accessed using lea reg, [rip] too. |
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02 Dec 2012, 22:03 |
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Teehee 02 Dec 2012, 22:34
baldr, i need a complete list of registers for intel arquitecture.
if someone could put here i thanks. Code: 8 16 32 64 80 128 256 ah al ax eax rax st0 xmm0 ymm0 bh bl bx ebx rbx st1 xmm1 ymm1 ch cl cx ecx rcx st2 xmm2 ymm2 dh dl dx edx rdx st3 xmm3 ymm3 dil di edi rdi st4 xmm4 ymm4 sil si esi rsi st5 xmm5 ymm5 bpl bp ebp rbp st6 xmm6 ymm6 spl sp esp rsp st7 xmm7 ymm7 r8b r8w r8d r8 xmm8 ymm8 r9b r9w r9d r9 xmm9 ymm9 r10b r10w r10d r10 xmm10 ymm10 r11b r11w r11d r11 xmm11 ymm11 r12b r12w r12d r12 xmm12 ymm12 r13b r13w r13d r13 xmm13 ymm13 r14b r14w r14d r14 xmm14 ymm14 r15b r15w r15d r15 xmm15 ymm15 cs cr0 cr0 ds cr2 cr2 es cr3 cr3 fs cr4 cr4 gs cr8 ss dr0 rip dr1 mm0 dr2 mm1 dr3 mm2 dr6 mm3 dr7 mm4 mm5 mm6 mm7 Last edited by Teehee on 03 Dec 2012, 11:32; edited 3 times in total |
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02 Dec 2012, 22:34 |
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baldr 02 Dec 2012, 23:03
Teehee,
Then you should exactly define term «register» and study Intel SDM or AMD APM with regard of it. MMX registers are 64 bits wide. They do share portion of FPU stack memory space.  |
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02 Dec 2012, 23:03 |
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Teehee 02 Dec 2012, 23:22
edited
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02 Dec 2012, 23:22 |
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Tomasz Grysztar 02 Dec 2012, 23:51
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02 Dec 2012, 23:51 |
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Teehee 03 Dec 2012, 11:28
oh, nice!
I never touched FPU, MMX, SSE, AVX registers. FPU for floating points. MMX is the lower part of the FPU registers, right? They are like eax and ax. About SSE and AVX I have no idea ^^ |
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03 Dec 2012, 11:28 |
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edfed 03 Dec 2012, 15:49
Code: 8 16 32 64 80 128 256 ah al ax eax rax st0 xmm0 ymm0 bh bl bx ebx rbx st1 xmm1 ymm1 ch cl cx ecx rcx st2 xmm2 ymm2 dh dl dx edx rdx st3 xmm3 ymm3 dil di edi rdi st4 xmm4 ymm4 sil si esi rsi st5 xmm5 ymm5 bpl bp ebp rbp st6 xmm6 ymm6 spl sp esp rsp st7 xmm7 ymm7 r8b r8w r8d r8 xmm8 ymm8 r9b r9w r9d r9 xmm9 ymm9 r10b r10w r10d r10 xmm10 ymm10 r11b r11w r11d r11 xmm11 ymm11 r12b r12w r12d r12 xmm12 ymm12 r13b r13w r13d r13 xmm13 ymm13 r14b r14w r14d r14 xmm14 ymm14 r15b r15w r15d r15 xmm15 ymm15 cs cr0 cr0 ds cr2 cr2 es cr3 cr3 fs cr4 cr4 gs cr8 ss dr0 rip dr1 mm0 dr2 mm1 dr3 mm2 dr6 mm3 dr7 mm4 mm5 mm6 mm7 flags eflags rflags |
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03 Dec 2012, 15:49 |
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