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A$M



Joined: 29 Feb 2012
Posts: 94
A$M 21 Sep 2012, 20:56
I have a "simple" question. How to enable multitasking on protected mode, using the simpler code? Please, help me. I searched and I cannot find a simple code. Sad
Post 21 Sep 2012, 20:56
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cod3b453



Joined: 25 Aug 2004
Posts: 618
cod3b453 22 Sep 2012, 07:43
The simplest way is using iret to switch from system to user level. Switching between tasks is normally done pre-emptively, so either an interrupt or system call from the current process stops the current task and enters the system handler that decides to return to the other task. At each switch, you'll want to save the state of the two user process and the system and swap these before/after each switch in the system handler.
Post 22 Sep 2012, 07:43
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A$M



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A$M 22 Sep 2012, 13:12
cod3b453 wrote:
The simplest way is using iret to switch from system to user level. Switching between tasks is normally done pre-emptively, so either an interrupt or system call from the current process stops the current task and enters the system handler that decides to return to the other task. At each switch, you'll want to save the state of the two user process and the system and swap these before/after each switch in the system handler.


That I already know. But how can I do this? Exemplify, please. Wink
Post 22 Sep 2012, 13:12
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Dex4u



Joined: 08 Feb 2005
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Dex4u 22 Sep 2012, 18:20
Here you go, i dug this from some backup cd, this sort of code was every where, but it is all lost, because no one does OsDev any more.
I may up load all this stuff one day.
Here's the read me file
Quote:

WHAT IS THIS?

=============

Sample protected-mode code, in increasing order of complexity:



* Basic 32-bit protected mode.

* Access to text-mode video memory. * Linear (flat) memory.

* Return to real mode. * PM interrupts/exceptions.

* Test for Virtual 8086 mode. * PM text-output subroutine.

* CPU detection (386 or better). * Software interrupt validation.

* "Unreal" mode (flat real, big real).

* Copying code to alternate memory location and running it there.

* Enabling A20 gate. * Running code in extended memory.

* Simple task state segment (TSS) use.

* Preemptive multitasking via timer interrupt.

* Ring 0 (kernel/system mode) code to/from Ring 3 (user mode) code.

* Syscalls. * Reprogramming 8259 interrupt chip.

* Interface/linking to C-language code. * Beginnings of a libc.

* More elaborate syscalls/exception handler.

* Scrolling video and cursor movement.



PM1.ASM is heavily commented, and tries to serve as a tutorial.



The .ASM files are written in x86 assembly language and should be

assembled with NASM (the free x86 assembler) like this:

nasm -o pmXXX.com pmXXX.asm

I am also including the PM12C.C file, which needs DJGPP, the free

32-bit C compiler for MS-DOS.



A pre-compiled version of NASM 0.97 that I downloaded from the Internet

gave me a lot of grief. The problems went away after I downloaded the

NASM sources and compiled them myself under DJGPP. Be warned.



These programs assume a 386 or better CPU (386 SX/DX, 486 SX/DX, Pentium,

Pentium II, non-Intel clone processors, etc.).



WHERE IS THIS?

==============

http://www.execpc.com/~geezer/os/pm.zip



WHAT CAN I DO WITH THIS?

========================

Anything you want, so long as you don't

- take credit for something you didn't do, or

- blame me for the results.



WHY DOESN'T IT WORK?

====================

See KNOWN BUGS, below.



"My computer freezes up!"

pm10 and later programs do not include code to return to real mode: after

doing their thing, they freeze. Press the reset button or cycle power to

reboot.



"It doesn't freeze up but nothing gets printed."

These apps put text on the top line of the screen by writing directly to

video memory. If the cursor is at the bottom of the screen when you type

pm1 (or whatever), the output of the program will get scrolled off the

top of the screen after it returns to DOS. Try

cls

pm1 (or whatever)

(thanks to Mark for the heads-up on this).



"These programs freeze up my computer without printing anything."

pm6 will crash if extended memory is in use (e.g. by SMARTDRV). If the

crash is happening in other situations, please let me know about it.



"The computer just reboots."

Again, this shouldn't happen (and again, let me know if it does). Bad

protected-mode code often makes the CPU triple-fault, which causes the

computer to reset itself. Hopefully, this code is simple enough that it

shouldn't have any bugs.



"Windows 95 says 'MS-DOS mode' and terminates the program."

These programs won't run under Windows. MS-DOS mode might work, but it's

better to reboot the computer, wait for 'Starting Windows 95...' and quickly

press F8. Then chose 'Safe mode command prompt only' and run these files.



"EMM386 privileged operation error..."

Same problem as Windows (CPU is in Virtual 8086 mode). If you are loading

EMM386.EXE in CONFIG.SYS, comment it out. Or use the F8 boot option

described above. The EMM386 that comes with Win95 lets you press 'C' to

disable EMM386 and continue, which may or may not work.



"Nothing happens, no 'Hello' or reboot -- it just returns to DOS."

pm3.asm through pm6.asm return to DOS if Virtual 8086 mode is detected

(Windows DOS box or EMM386). pm4.asm through pm6.asm return to DOS if an

8088 or 80286 CPU is detected (though this hasn't been tested). Type

test pm3

and look at the output. If it says

Program 'pm3' returned errorlevel 1.

then the CPU is in Virtual 8086 mode (Windows DOS box or EMM386 in use).

If you type 'test pm4' and get

Program 'pm4' returned errorlevel 2.

this means the CPU is not a 386 or better.



WHERE'D YOU LEARN TO DO THIS?

=============================

Freedows '98 -- Copyright (C) 1997 Joachim Breitsprecher

<j.breitsprecher@schwaben.de>



Benn Vosseteig posted some spiffy Ring 0-to-Ring 3

code on the OS development board at

http://milkyway.isa.net.au/os-dev/cgi-bin/blueboard.exe



Linux -- Copyright (C) 1991, 1992 Linus Torvalds

I recommend the 'Historic' kernel (version 0.01), available from

http://www.kernel.org/pub/linux/kernel/Historic/linux-0.01.tar.gz



INTEL 80386 PROGRAMMER'S REFERENCE MANUAL 1986, available from

http://www.execpc.com/~geezer/os/386intel.zip

and many other sites.



Robert Collins' "Intel Secrets" web site:

http://www.x86.org



Josh McDonald's OS/2000

http://www.effect.net.au/os-dev/



KNOWN BUGS

==========

One task of pm8 seems to die if run indefinitely instead of only 18 times

(maybe this is some kind of weird resonance).



FEEDBACK

========

...is welcome.



Christopher Giese <geezer[AT]execpc.com>



Description:
Download
Filename: pm.zip
Filesize: 88.79 KB
Downloaded: 507 Time(s)

Post 22 Sep 2012, 18:20
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A$M



Joined: 29 Feb 2012
Posts: 94
A$M 22 Sep 2012, 19:10
Sorry, Dex4u, but this code is big and coded for NASM. What lines are to multitasking? I do not understand this.
I know how GDT, IDT and PM works. Can you write only the lines for multitasking? (please use FASM)
Post 22 Sep 2012, 19:10
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BAiC



Joined: 22 Mar 2011
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BAiC 27 Sep 2012, 15:23
multitasking is not simple. judging from your previous requests if you want Hardware Multitasking your going to need alot more experience with Assembly in general before your capable of getting any usage from the x86 Task Switching functionality.

if you want a Software Multitasking system you'll need

) a State Machine to record -- and use -- information about the current task while it's running. you'll also need State for each task that holds the processors' register array.

) an Interrupt Service Routine to perform the switching. this requires you to store the entire register set of the processor and recover the entire register set of the task being woken.

) generally you'll need a true linked list to implement each Task State since your software won't be an Operating System if it's simply executing a fixed set of procedures that were included in the kernel.
Post 27 Sep 2012, 15:23
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revolution
When all else fails, read the source


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revolution 27 Sep 2012, 15:28
BAiC wrote:
... this requires you to store the entire register set of the processor and recover the entire register set of the task being woken.
There is more to it than that in PM. You also need to consider paging, caches and a few other things.
Post 27 Sep 2012, 15:28
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BAiC



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BAiC 27 Sep 2012, 15:33
Dex4u wrote:
no one does OsDev any more.
no one?

1) Operating Systems are a finite platform for advancement.
2) Operating Systems are highly technical limiting diversity among the different implementations.
3) Operating Systems have an extremely high cost of entry.

that said Operating Systems have never been the most popular but to say that no one does Operating System development is just plain wrong. the OP is obviously a student to software development. meaning that A$M is fresh meat for the OS grinder Twisted Evil.

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Post 27 Sep 2012, 15:33
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BAiC



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BAiC 27 Sep 2012, 15:37
revolution wrote:
BAiC wrote:
... this requires you to store the entire register set of the processor and recover the entire register set of the task being woken.
There is more to it than that in PM. You also need to consider paging, caches and a few other things.


rev: why the fuck do you bother responding to my posts? you don't seem to read them much less understand them. Caches are transparent to software in the x86 architecture and Paging is optional. the OP was referring to Task Switching, particularly simple task switching.

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Post 27 Sep 2012, 15:37
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revolution
When all else fails, read the source


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revolution 27 Sep 2012, 15:46
BAiC wrote:
Caches are transparent to software in the x86 architecture ...
Definitely not when you are writing an OS!
BAiC wrote:
... and Paging is optional.
Not in 64-bit mode. Besides, the OP never said if paging was being used or not. It would be unfair to answer based upon an unstated assumption.
BAiC wrote:
the OP was referring to Task Switching, particularly simple task switching.
The things I mention must be taken into account if paging is used. If they are just ignored then lots of unexplained bugs are likely to happen. Is it not better to at least make the OP aware of potential problems?
Post 27 Sep 2012, 15:46
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BAiC



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BAiC 27 Sep 2012, 16:02
revolution wrote:
BAiC wrote:
Caches are transparent to software in the x86 architecture ...
Definitely not when you are writing an OS!
BAiC wrote:
... and Paging is optional.
Not in 64-bit mode. Besides, the OP never said if paging was being used or not. It would be unfair to answer based upon an unstated assumption.
BAiC wrote:
the OP was referring to Task Switching, particularly simple task switching.
The things I mention must be taken into account if paging is used. If they are just ignored then lots of unexplained bugs are likely to happen. Is it not better to at least make the OP aware of potential problems?


paing and multitasking are independent. the OP didn't ask about Paging. the OP asked about Multitasking. therefore the discussion would exclude such off-topic details as Paging. in other words: your comments are pushing the discussion off topic. if you want to discuss Paging I suggest you start your own thread.

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Post 27 Sep 2012, 16:02
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revolution
When all else fails, read the source


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revolution 27 Sep 2012, 16:17
BAiC: You are being unfair. When dealing with task switching the x86 programmer absolutely needs to consider paging and caches. If you simply ignore them then you will get some really ugly bugs and/or the OS is extremely basic. I have no idea how complex or basic the OPs OS is, but rather than asking such questions I point out that there are extra things to consider. If the OP doesn't use paging or has all caches in such a state where task switching does not affect them them fine, the OP can happily not worry about it, but at least the OP is aware to check such things.
Post 27 Sep 2012, 16:17
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BAiC



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BAiC 27 Sep 2012, 16:39
my x64 Operating System, Mathis, uses a flat memory model. every memory region in the page tables are identity mapped. Mathis supports Multiple processors and each core is given the same memory map (essentially the same CR3). Mathis also implements pre-emptive task scheduling. when the Task Switching algorithm that Mathis has triggers the next task it executes without deference to paging. my Task Switching code is extremely simple if you compare it against other Software Task Switchers and it doesn't have a single reference to Paging.

I'm currently implementing Fragger, the File System for Mathis, so the version of Mathis on my website is outdated but still represents the concepts I've been referring to. particularly the pre-emptive task switching code: Anarque (Anarchy Task Queue).

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Post 27 Sep 2012, 16:39
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revolution
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revolution 27 Sep 2012, 16:46
BAiC: That is great that you have explained that. And your ability to ignore caches and page tables on task switch is entirely dependent upon your precise setup. If someone else has a different setup then things change. I hope the OP can now understand for their system that they need to check whether they have a setup that requires a little bit of further analysis.
Post 27 Sep 2012, 16:46
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A$M



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A$M 27 Sep 2012, 17:59
Well... Wait a minute. This is a mess. I intend to program in 32-bit, do not intend to use paging, I wonder how to make multitasking easier and would appreciate if someone give a sample code.
It does not matter if the code is long or difficult to understand for a beginner. But to avoid this, please insert comments in the code telling that serves the command.
Thank you in advance. Smile
Post 27 Sep 2012, 17:59
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16bitPM



Joined: 08 Jul 2011
Posts: 30
16bitPM 27 Sep 2012, 19:45
A$M wrote:
Well... Wait a minute. This is a mess. I intend to program in 32-bit, do not intend to use paging, I wonder how to make multitasking easier and would appreciate if someone give a sample code.
It does not matter if the code is long or difficult to understand for a beginner. But to avoid this, please insert comments in the code telling that serves the command.
Thank you in advance. Smile


A few words:

* consider the fact that you are maybe trying to program something beyond your experience. As other posters said, this is no easy thing no matter where you come from.
* because you can not identify the task switching code from given examples, I suggest you read the manuals again (and again...). Both iNTEL and AMD have great documentation.
* There ARE code samples out there. One good example is the linux-0.0.1 source code (yes, the very first version), which is very basic and greatly documented.
* I'm starting myself and trust me, I'm going to ask stupid questions myself... but... I wait until I'm ready to produce a rudimentary piece of code which should do the things needed according to my own understanding. It's highly likely to fail soon, but in my opinion you learn best from making mistakes and at least give it a couple of tries before asking for help.
Post 27 Sep 2012, 19:45
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BAiC



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BAiC 27 Sep 2012, 20:07
A$M: Multitasking is never a simple task. alot of stuff is necessary at boot before an elegant task switching mechanism can get any work done. one of the most important tasks is initializing the State Machine. this is my Interrupt Service Routine. it represents the fundamental process of a task switcher..

Code:
            lea rdi, ORB.Controls, .init;The State Machines' Base Address.
            
            ;respond to the interrupt by writing to the local APICs' End of Interrupt Register.
            xor ecx, ecx
            mov[dword APIC.EOI], ecx
            
            ;don't perform the switch unless the current task has had a certain period of time to run.
            tsc; this is a macro for getting the RDTSC value into a single register (rax by default).
            cmp rax,[rdi+orb.timeout]
            jb .end.switch
            
            ;the empty condition. don't perform a task switch if the list is empty.
            mov rbx,[rdi+NRQ.CurrentTask]
            cmp rbx,[rbx+orb.next]
            je .end.switch
                ;push the registers onto the stack. r8 replaces the return address.
                mov[rsp],r08
                psh r09 r10 r11 r12 r13 r14 r15
                    ;preserve the FPU/XMM registers in the Task State
                    fxsave64 [rbx+orb.xmm]
                        
                        mov[rbx+ orb.rsp],rsp
                        
                        mov rcx,[rbx+ orb.int]
                        and rcx, -4
                         or rcx,  1
                        mov[rbx+ orb.int],rcx
                        jmp NRQ.Spin, .init
                        
           .end.switch:
            ret    

"jmp NRQ.Spin" leads to the following code block. it performs the State Machine reads/writes to trigger the next task.
Code:
                
                tsc;this will record the timestamp into the Task State.
                lea rdi, ORB.Controls, .init
                mov ebx, NRQ.TSC.Task, .init
                mov rcx,[rdi+NRQ.CurrentTask]
                mov rsi,[rcx+orb.next]
                add rbx, rax
                mov[rsi+ orb.time],rax
                sub rax,[rcx+orb.time]
                add[rcx+ orb.sum], rax
                mov[rdi+ orb.timeout],rbx
                mov[rdi+ NRQ.CurrentTask],rsi
                if  dbg.CountSwitches
                    add[rdi+ NRQ.SwitchCount], 1
                end if
                
                mov rsp,[rsi+orb.rsp]
                mov rax,[rsi+orb.int]
                and rax, 4-1
                dt .short .full, .empty, jmp
                            
                            rali ., line
                           .empty:
                                
                                psh NRQ.Flags, .init
                                popf
                                
                            jmp[rsi+orb.handler]
                            rali ., 16
                           .full:
                            ;begin the inverse of what the Task Switcher code performed.
                        fxrstor64 [rsi+orb.xmm]
                        
                    pop r15 r14 r13 r12 r11 r10 r09 r08
                
                rali ., 16
               .short:
                pop rbp rsi rdi rbx
                
            pop rcx rdx rax
            
        iretq    

Notes:
rali : A macro for alignment. I use heavy SMC and Templating. the align directive does not perform alignment when the code is copied elsewhere.

tsc: Time Stamp Counter. turns output from RDTSC instruction into a single 64bit result.

dt : Differential Table. this is basically a switch table you would recognize from higher level languages (C).

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Post 27 Sep 2012, 20:07
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A$M



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A$M 28 Sep 2012, 19:03
Oops... I do not understand anything! I now want well explained tutorials in English or Portuguese, whatever, because I'm not understanding the codes.
Thanks.
Post 28 Sep 2012, 19:03
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Dex4u



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Dex4u 28 Sep 2012, 21:14
BAiC wrote:
Dex4u wrote:
no one does OsDev any more.
no one?

1) Operating Systems are a finite platform for advancement.
2) Operating Systems are highly technical limiting diversity among the different implementations.
3) Operating Systems have an extremely high cost of entry.

that said Operating Systems have never been the most popular but to say that no one does Operating System development is just plain wrong. the OP is obviously a student to software development. meaning that A$M is fresh meat for the OS grinder Twisted Evil.

I should of said, no one makes a new OS anymore, not a hello world OS, but a full OS with cli/gui/tcp/ip/usb/sound/ fully self supporting with fasm port and ide etc.
Linux has killed this.

And i know all above OS's coding, see here :

http://www.techradar.com/news/software/operating-systems/10-best-alternative-operating-systems-934484

http://royal.pingdom.com/2008/09/26/10-amazingly-alternative-operating-systems-and-what-they-could-mean-for-the-future/
Post 28 Sep 2012, 21:14
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