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Pinczakko 12 Apr 2012, 17:20
According to http://www.rcollins.org/ddj/Aug98/Aug98.html article,
the "access rights" (G, D/B, P, DPL, S and Type bits) and the limit bits in the segment descriptor cache are "honored" (not changed) even if the segment register value is changed in real mode (16-bit)--only the base address bits are changed. Well, of course this scenario excludes reloading the descriptor cache by "switching to Protected mode". Is this fact still holds true in present day x86 CPUs? I mean the details of the venerable "Unreal-Mode" doesn't change  .
Anyway, I'm particularly concerned about the segment-access-rights bits. _________________ Human knowledge belongs to the world |
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12 Apr 2012, 17:20 |
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