flat assembler
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> Main > feature request OR question how to do separate mnemonics |
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revolution 26 Jan 2012, 10:58
Please give some examples of what you want to do.
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26 Jan 2012, 10:58 |
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matefkr 26 Jan 2012, 11:33
suppose, i want self modifing code, so that the operands would be modfied
so i would modify operand info byte, like increase some part of it (to use registers as continious memory). But anyhow, if thats a low level language, i just want better control over what i write (and defining it in place when i write it). You know that for mov eax, some thing there is two version for example. similarly with add etc. so is it possible to define such instructions which would translate exactly, or if not it would be a good featuer. |
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26 Jan 2012, 11:33 |
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revolution 26 Jan 2012, 11:35
I meant to give examples of how you want the instructions to look and what they would replace.
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26 Jan 2012, 11:35 |
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matefkr 26 Jan 2012, 16:41
of course.
for example: if you write mov op1,op2 then it would always be translated to the opcode where the operands are placed in operand info byte (and sig if necessary), plus imm if necessary. if you write moveax op, then it would use the one by implicit eax operand opcode (i think the op here is alway imm, but whatever). so the thing is, if there is two ways to code an instruction (some have two ways, one with operand implicit in opcode) then there should be two forms, where the implicit opcode one would have the operation and implicit operand named in the opcode together such as above. obviously if there is to and from version then some word would be used to distinquesh them. I think relative jumps, where there is short and normal jump is already possible to be forced. |
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26 Jan 2012, 16:41 |
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edfed 26 Jan 2012, 17:01
Code: macro moveax op { mov eax,op } moveax ebx ;mov eax,ebx moveax 4323;mov eax,4323 ? |
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26 Jan 2012, 17:01 |
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revolution 26 Jan 2012, 17:05
matefkr: I think I understand what you are asking now.
Code: mov eax,ebx ;can be encoded in two ways Is that what you want to have control over? |
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26 Jan 2012, 17:05 |
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matefkr 26 Jan 2012, 19:17
Revolution: Indeed also this one, but not just that one. so every kind of encoding an instruction should be separate mnemonic or prefix at lest. so to make it more close to hex coding, but with mnemonics and stuff.
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26 Jan 2012, 19:17 |
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revolution 26 Jan 2012, 19:43
I have previously discussed this in PM before with another poster on this board.
Inventing new custom mnemonics might alienate new users to assembly. Perhaps there is a way where you can use just the operands to describe the desired order of placement in the encoding. e.g.: Code: mov eax(r/m),ebx(reg) ;encoding 1 mov eax(reg),ebx(r/m) ;encoding 2 |
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26 Jan 2012, 19:43 |
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edfed 26 Jan 2012, 20:57
Code: (32|16) mov (r1,r2|r2,r1|r,m|m,r|r,i|m,i) r1,r2 with 16 mov r2,r1 eax,edx ;to give use16 mov edx,eax it might be possible with a sort of macro + maybe modifications of fasm preprocessor + a lot of things very strange to identify. |
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26 Jan 2012, 20:57 |
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l_inc 26 Jan 2012, 21:15
matefkr
There's a thing called "epimorphic assembler". It's implemented as a macro altm for an assembly/disassembly engine provided there. It allows to choose different opcodes for same mnemonic which could be helpful, if you need a binary identical reassembly, but it uses a numeric encoding scheme instead of providing additional mnemonics which is not quite human-friendly (however, it's also hard to do it better). You could use the same encoding scheme to implement a fasm macro with same capabilities. |
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26 Jan 2012, 21:15 |
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uart777 02 Feb 2012, 03:27
FASM always generates the smallest instruction format: jmp i8, push i8 (extended to 32), etc, and register (opcode+r) and al/ax/eax specific versions that do not have a modr/m or [s*i+b] byte. Why would you want it to do anything else?
As for custom instructions, it's very easy to encode them manually if you know Intel machine code. Example: Code: macro bug { db 0CCh } ; int3 breakpoint exception macro cmp_eax_i32 i { ; no prefix db 03Dh ; opcode, 1 byte ; no modrm or sib ; no displacement dd i ; immediate, 4 bytes } |
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02 Feb 2012, 03:27 |
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