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> Main > Intel has added a new instruction (RDRAND) Kewl !Goto page Previous 1, 2 |
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DOS386
> But before that new instruction, programmers had to work with rdtsc only?
YES. And before RDTSC they had this technology: http://xkcd.com/221/ |
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21 Aug 2011, 15:38 |
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f0dder
DOS386 wrote: > But before that new instruction, programmers had to work with rdtsc only? If you use a decent PRNG, you might be able to get away with seeding it fromt RDTSC... but using RDTSC *in* the PRNG? Doesn't seem like a good idea, as it's a sequentially increasing number. _________________  - carpe noctem |
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21 Aug 2011, 16:00 |
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DOS386
You can pick randomness from keystokes, mouse movements, HD, BIOS clock, RDTSC, temperature sensors, audio input, ...
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21 Aug 2011, 16:11 |
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emc
I perceive, thanks for these informations!
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21 Aug 2011, 16:35 |
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AsmGuru62
There are also these RNGs:
http://en.wikipedia.org/wiki/Xorshift http://en.wikipedia.org/wiki/Mersenne_twister I tested these for my STAR TREK clone - excellent generators. |
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22 Aug 2011, 13:13 |
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revolution
AsmGuru62 wrote: There are also these RNGs:  |
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22 Aug 2011, 13:19 |
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AsmGuru62
Yes, but as I said - tests will not show the difference between the REAL generator and PSEUDO one.
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22 Aug 2011, 16:32 |
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revolution
Interesting article about the all-digital generator Intel use.
http://spectrum.ieee.org/computing/hardware/behind-intels-new-randomnumber-generator/0 Quote: Our previous analog random-number generator was able to produce only a few hundred kilobits of random numbers a second, whereas our new generator spins them out at a rate of around 3 gigabits per second. |
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02 Sep 2011, 00:42 |
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MCD
Here is the problem with a real random number instruction:
How can you check that the instruction delivers real physical random numbers, and not simply a TSC-seeded PRNG value? Especially on a chip where you neither know the layout nor can verify its implementation. After all, you can't say "that result shouldn't happen according to that input", since every output is as likely to occur as any other. On the other hand, maybe the instruction was not intended to be used as a cryptographically secure hardware random number generator, or was it? |
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15 Dec 2011, 01:02 |
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revolution
MCD wrote: How can you check that the instruction delivers real physical random numbers, and not simply a TSC-seeded PRNG value? MCD wrote: On the other hand, maybe the instruction was not intended to be used as a cryptographically secure hardware random number generator, or was it? |
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15 Dec 2011, 01:19 |
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Matrix
ahah i did something similar now for amd64, getting random numbers at speeds limited by memory write performance
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02 Feb 2012, 21:18 |
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f0dder
Matrix wrote: ahah i did something similar now for amd64, getting random numbers at speeds limited by memory write performance  _________________ - carpe noctem |
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02 Feb 2012, 21:22 |
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Matrix
f0dder wrote:
that was fast
i'll post details, but now i'm kind of busy |
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02 Feb 2012, 21:34 |
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f0dder
Does it involve using special chipset features? (Some AMD (and Intel, for that matter) chipsets have had hardware rngs), or does it involve read/writing arbitrary memory regions that don't have physical memory backing?
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02 Feb 2012, 21:41 |
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edfed
no need of rdtsc to generate prng at all.
prng just generate a sequence of bits for a given seed. change the seed, you have a different sequence. |
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06 Feb 2012, 08:29 |
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