Hi everyone!
The question is: Is paging worth of implementing???

If you're writing a 64 bit OS then you have to use paging, however, it is optional for 16/32bit.

The question of whether paging is worth it depends on your design goals; the ultimate goal of paging is to map more virtual memory than there is physical memory. You can simply check the physical memory limit and operate within that and it should work fine but there are certain regions in memory that are occupied with other things (PCI devices etc).

One useful property of paging is that you can map a linear virtual address range to a set of physically fragmented memory regions and map the remaining regions on the end. This makes the page table creation more complex but the memory allocation/management far simpler.

Some other useful properties of paging are caching properties, execution protection and the ability to "double map" physical regions but these are quite specific. Paging also allows you you to implement page swapping to disk using the present flag and page fault interrupt to manage which pages are copied out of-/back to- memory (this allows more memory than just the physical limit); again, this is optional.

Hope that helps.

If i'm not going to swap memory, but just for convinience of memory managment - it will work faster than just segmentation???
and what sizes of page can i select???

Segments are only available in 16bit. In 32bit protected mode, non-paged memory should be faster than paged (though I'm not sure this is noticeable). Pages sizes for 32bit are 4k and either 2M or 4M; in 64bit you can also have 1G pages.

I wanted 64K pages

Well, are you sure that non-paged is faster than paged, cuz I think that many years passed since paging got popular and intel guys would optimize it as much as possible...

Paging is needed for more than just swapping: Protection, Auto-growing stack, memory mapped files, etc.

Also, how do I address memory in paging???

There's all written in the intel manuals

Do I need GDT in paging??? If yes, then how do pages interact with GDT???

Intel Manuals please

Argh.... Those manuals are looooong :lazy:

They are just as long as paging is complicated

if you want, you can simulate some paging in real mode.

for that, you need something like an interruption to update the paged memory.

then, you need 3 segments:
DS is the segment used to point to the paged memory.
another segment to contain the real memory
another to contain the paging structure, constituted of pointers. a sort of lut.

periodically, the interrupt updates the DS segment accordinglly to the LUT, and the real memory.

an entry in the put is used to tell where the data comes from in the real memory segment, for each place in the paging structure.


in real mode, it will give the possibility to build 2 bytes pages.
then, 32 kpages.
when you will have a simple paging like this working, you will understand the big hardware pm paging that uses directlly the adress decoder in the process of effective to physical adress translation.

as there are 32k words in a segment, you can translate every single words anywhere else, on an even adress in the DS segment.
this is a sort of simulated paging.

Still, Does paging interact with segments in GDT and if yes how???
P.S.: I just need at least aproximate picture to plan what I'm gonna do, when, and how...