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Index > Main > mov dr(x),reg (serializing instruction)

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ouadji



Joined: 24 Dec 2008
Posts: 1081
Location: Belgium
ouadji

3A/8.3

The example shows the use of a new value.
... but there is nothing about this in the "text".

Is it absolutely necessary to use a new value to get a real serializing behavior ? ... or not ?

Has someone an experience about it?

(someone, anyone ??? Crying or Very sad sorry, I don't know)



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Crying or Very sad

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Post 23 May 2011, 18:01
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Madis731



Joined: 25 Sep 2003
Posts: 2140
Location: Estonia
Madis731
Most probably CPU does not have a caching mechanism for writes to any register. If you think about it, it is easier to just overwrite the register than to check if the two values are equal and then overwrite it.

I think the documentation is a bit ambiguous about this, but you can be certain that the value must not be "new" in the sense that this value already is in that register. Every write to a register overwrites the value in that register. New or not.
Post 24 May 2011, 10:53
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edfed



Joined: 20 Feb 2006
Posts: 4240
Location: 2018
edfed
apparentlly, the serialisation here means that the execution of all instruction preceding a "Privileged serializing instruction" should be achieved before the instruction can be executed.

for example,
Code:
mov [gdt.size],ecx
mov ebx,gdt.gdtr
lgdt [ebx]
    

will need to complete every general purpose instructions before the lgdt [ebx] instruction. otherwise, it can crash probably the cpu.



when you enter a new value in cr, dr, gdtr, idtr, etc.. register.

this can be due (i suppose) to the fact that some initialisation should be made onthe structures and registers of this kind of extension.
because control reg, debug reg, etc, it is an extension of the processor.
a system part, where you don't execute code, but control the execution of code, the system controler circuitry.

then, a privileged instruction will induce serializing.
cpuid, iret and rsm don't induce serialization, but are privileged, because they depend on the system controler.
Post 24 May 2011, 13:08
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ouadji



Joined: 24 Dec 2008
Posts: 1081
Location: Belgium
ouadji

Thank you Madis731 (interesting reply !)

"I think the documentation is a bit ambiguous about this" (it seems to me too!)

edfed,
Quote:
cpuid, iret and rsm don't induce serialization, but are privileged ...
sorry but I don't understand why you say that.
In fact it's just the opposite.
cpuid, iret and rsm are serializing instructions (intel 3A/8.3)
and are not privileged (Intel 3A/5.9)
or else, I am missing something in your reply.
that said, all privileged instructions are not serializing instructions,
like CLTS, RDMSR ...

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Post 24 May 2011, 16:01
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