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ouadji



Joined: 24 Dec 2008
Posts: 1081
Location: Belgium
ouadji 25 Apr 2011, 09:46

do I put a delay between writing and reading of a IOAPIC register
Code:
;P5Q Pro Q6600 2.8Ghz

;proc SetIntIrq IRQ:dword, INT:dword, mask:dword

    ...
 mov     ebx,[IRQ]
   mov     eax,[mapped_IOAPIC_base]

        lea     ebx,[(ebx*2)+10h]
   mov     [eax],ebx               ;IO_APIC[0]=IOREGSEL

    ;delay <--------  Question

        mov     ebx,[eax+(4*4)]         ;IO_APIC[4]=IOWIN
   ...

    

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Post 25 Apr 2011, 09:46
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution 25 Apr 2011, 10:00
ouadji wrote:
do I put a delay between writing and reading of a IOAPIC register
No.

The CPU is already many times faster than the I/O bus, so any short delay you might try to insert would have no affect anyway.
Post 25 Apr 2011, 10:00
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ouadji



Joined: 24 Dec 2008
Posts: 1081
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ouadji 25 Apr 2011, 11:24

thanks for your reply revolution

If the CPU is many times faster than the I/O bus,
will the data be available when the CPU will read it ?
and this in any cases ?
If the I/O bus and IOAPIC are slower than cpu,
the data will be maybe not yet available or not yet stable ?
(is there a waiting signal between the IOAPIC and the cpu?)

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Post 25 Apr 2011, 11:24
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revolution
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revolution 25 Apr 2011, 11:41
The I/O bus takes care of all the timing. Don't worry about it. The hardware knows what it is doing. You don't need to do anything software-wise to make it work.
Post 25 Apr 2011, 11:41
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ouadji



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ouadji 25 Apr 2011, 12:54

ok, understood, thank you revolution.

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Post 25 Apr 2011, 12:54
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b1528932



Joined: 21 May 2010
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b1528932 25 Apr 2011, 13:35
no delay is ever needed when writing using mmio/pio.
if hardware needs time to do something and return in other register, it must provide away for you to poll it or trigger irq on completion.
In case of polling, for example you write to one register, and constantly read second one untill highest bit is 1. When its 1, you reset it (write this register again with msb =0) and assume data is 'correct'. This is just an example. If you must write multiple times something on register, i have bad news, you cant do that. You must use polling method every time. If hardware doesnt support it, it sucks. As far as i remember, PIC initialization require writing 2+ icw one after another to 1 register. This is a bad design as controller might be too slow compared to cpu.
Post 25 Apr 2011, 13:35
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ouadji



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ouadji 25 Apr 2011, 16:06
Quote:

it must provide a way for you to poll it or trigger irq on completion.

(in advance, sorry for my English, I do my best) Confused

In the case of ioapic, there is nothing to do that.
(like you say.... polling or other ways).
It seems that the hardware (ioapic) did not need delay to react.
(since it gives no way to check this delay)
Having said that, currently, the ioapic is part of Southbridge,
that's maybe why it reacts so quickly to requests from the cpu.

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Post 25 Apr 2011, 16:06
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