shifting 16 and 32bit reigsters.

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b1528932

Joined: 21 May 2010
Posts: 287

b1528932 04 Feb 2011, 03:49

Why i can shift al and ax by 8/16 bits, while i cant shift eax by 32 bits?
I want to test fo LSB/MSB, and when i shift ax by 16 bits, i have MSB.LSB in CF.
When i shift eax by 32 bits, its masked so effective shift is by 0 bits.

Why is that? Its very confusing, if someone (like me) is porting a code from 16 to 32 bit. Unfortunatly i cant use bsr/bsf because 80286 lack it while supporting 32bit mode, i can do and and shift something else...

04 Feb 2011, 03:49

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20630
Location: In your JS exploiting you and your system

revolution 04 Feb 2011, 04:28

Code:

test eax,eax
test ax,ax
test al,al
js .somwhere

04 Feb 2011, 04:28

DOS386

Joined: 08 Dec 2006
Posts: 1905

DOS386 04 Feb 2011, 08:47

> someone (like me) is porting a code from 16 to 32 bit. Unfortunatly
> i cant use bsr/bsf because 80286 lack it while supporting 32bit mode

80286 doesn't support 32-bit mode (EAX & Co) either, dude Very Happy

Code:

  bsr  eax 
  bsf  cr4
  beq  hell ; B*** S***

04 Feb 2011, 08:47

Madis731

Joined: 25 Sep 2003
Posts: 2139
Location: Estonia

Madis731 04 Feb 2011, 13:30

Code:

rcl eax,1 ;to test MSB
jc msb_is_set
rcr eax,1 ;to test LSB
jc lsb_is_set

; or the opposite: jnc interesting_bit_is_not_set

04 Feb 2011, 13:30

b1528932

Joined: 21 May 2010
Posts: 287

b1528932 04 Feb 2011, 14:41

ok im reaidng now about 80286, but in manuals there is nothing about it. It only support 24bit virtual space, i would like to compare for example GDT of 80286 with gdt of 80386.

I made few rules for my conding, 1 of them is not to use any instruction missing from 8086. bsr and bsf are missing.

In cpu wich doesnt have extended registers, when i shl ax,16, will it also mask to 0, or work like it does now?

04 Feb 2011, 14:41

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20630
Location: In your JS exploiting you and your system

revolution 04 Feb 2011, 14:50

b1528932 wrote:

I made few rules for my conding, 1 of them is not to use any instruction missing from 8086. bsr and bsf are missing.

In cpu wich doesnt have extended registers, when i shl ax,16, will it also mask to 0, or work like it does now?

shl ax,16 is also missing from 8086.

Maybe you are interested in this topic with macros to restrict your opcode usage automatically.

04 Feb 2011, 14:50

b1528932

Joined: 21 May 2010
Posts: 287

b1528932 04 Feb 2011, 15:38

shl isnt missing. Do you mean it will behave like shl eAX,32 on 80386 and newer?

04 Feb 2011, 15:38

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20630
Location: In your JS exploiting you and your system

revolution 04 Feb 2011, 16:09

shl with a constant shift other than 1 is not available on 8086.

Code:

shl ax,1 ;okay on 8086
shl ax,2 ;not okay on 8086

04 Feb 2011, 16:09

b1528932

Joined: 21 May 2010
Posts: 287

b1528932 04 Feb 2011, 19:44

How do you know that. Manuals only say that 8086 doesnt mask, while others do.

Also wikipedia instruction listing has shl in 8086 table.

I want a chart of all instruction supported by each later x86 cpu, starting from first one!

04 Feb 2011, 19:44

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20630
Location: In your JS exploiting you and your system

revolution 05 Feb 2011, 06:22

b1528932 wrote:

How do you know that.

I've read the manuals and have experience with programming for the ancient 8086.

b1528932 wrote:

I want a chart of all instruction supported by each later x86 cpu, starting from first one!

Maybe this:

http://ref.x86asm.net/index.html

05 Feb 2011, 06:22

DOS386

Joined: 08 Dec 2006
Posts: 1905

DOS386 05 Feb 2011, 07:42

b1528932 wrote:

ok im reaidng now about 80286, but in manuals there is nothing about it. It only support 24bit virtual space,

16-bit CPU , 16-bit ALU , 16-bit data bus , 16-bit registers , 24 address lines

> i would like to compare for example GDT of 80286 with gdt of 80386

80286: 64 KiB segment limit 16 MiB total limit
80386: 4 GiB segment and total limit

> I made few rules for my conding, 1 of them is not to use any
> instruction missing from 8086.

Then you can't upgrade to 32-bit code at all ("porting a code from 16 to 32 bit" see above) Wink

> bsr and bsf are missing

Preferring the slowest and most complicated idea. Just use BT or SHL/SHR or TEST Wink

> cpu wich doesnt have extended registers, when i shl ax,16,
> will it also mask to 0, or work like it does now?

SHL AX, 16 ; not valid for 8086

MOV CL,16
SHL AX, CL ; valid for 8086, but waste of time

BTW, 8086 has no GDT and no PM either Smile

_________________
Bug Nr.: 12345

Title: Hello World program compiles to 100 KB !!!

Status: Closed: NOT a Bug

05 Feb 2011, 07:42

Ninho

Joined: 07 May 2010
Posts: 16

Ninho 05 Feb 2011, 14:05

b1528932: \strike this out:\In addition to DOS386's correct remarks, and as a direct answer to your original post, please note that 80286 uses only the 4 LSB of the count for shift, rotate etc., i.e. a count of 16 (10 hex) will result in it being treated as a NOP in effect (not setting any flag, like you noted for the 80386 with a count of 32).\\

Edit: disregard the previous paragraph, it's wrong as pointed out by Revolution below.

A general note then : targetting either 8086, 80186, 80286 without the proper reference material is simply impossible. You can't learn the knowledge just by asking random questions, assuming even you get correct answers you won't know to ask /all/ the questions to start !

Don't rely on emulators either, you have no guarantee any of them will be correct in all cases - rather I can almost guarantee /any/ emulator you can find will be lacking in /some/ respect. Get, and /read/ the fine manuals (and even that, Intel manuals as well as the plethora of books which were more or less copy-catted from them contain ambiguities and omissions as well as plain errors, some voluntary).

Cheers...

--
Ninho

Last edited by Ninho on 05 Feb 2011, 16:28; edited 2 times in total

05 Feb 2011, 14:05

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20630
Location: In your JS exploiting you and your system

revolution 05 Feb 2011, 14:14

Ninho wrote:

b1528932: In addition to DOS386's correct remarks, and as a direct answer to your original post, please note that 80286 uses only the 4 LSB of the count for shift, rotate etc., i.e. a count of 16 (10 hex) will result in it being treated as a NOP in effect (not setting any flag, like you noted for the 80386 with a count of 32).

Actually it is 5 bits for the mask in 80186 and up. 8086 does not mask and can shift up to 255 times.

05 Feb 2011, 14:14

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20630
Location: In your JS exploiting you and your system

revolution 05 Feb 2011, 14:37

This text ...

Quote:

IA-32 Architecture Compatibility
The 8086 does not mask the shift count. However, all other IA-32 processors
(starting with the Intel 286 processor) do mask the shift count to 5 bits, resulting in
a maximum count of 31. This masking is done in all operating modes (including the
virtual-8086 mode) to reduce the maximum execution time of the instructions.

... has survived in the Intel manuals for at least the last 10 years. This is something that b1528932 should do, is read the manuals rather than rely on possibly incorrect information posted here by members. Not to say the error is deliberate, but mistakes and misunderstandings do happen, so it is always best to RTM and verify information you read.

05 Feb 2011, 14:37

Ninho

Joined: 07 May 2010
Posts: 16

Ninho 05 Feb 2011, 16:18

revolution wrote:

This text ...
Quote:
IA-32 Architecture Compatibility
The 8086 does not mask the shift count. However, all other IA-32 processors
(starting with the Intel 286 processor) do mask the shift count to 5 bits, resulting in
a maximum count of 31. .
... has survived in the Intel manuals for at least the last 10 years.

Right on all counts, Revo! Memory, exceptionaly good yonder, is starting to fail me. Shouldn't be a problem, except I've come to rely on it too much ;=) I'm glad you corrected me on that, at the same time confirming this :

Quote:

This is something that b1528932 should do, is read the manuals rather than rely on possibly incorrect information posted here by members. Not to say the error is deliberate, but mistakes and misunderstandings do happen, so it is always best to RTM and verify information you read.

--
Ninho

05 Feb 2011, 16:18

b1528932

Joined: 21 May 2010
Posts: 287

b1528932 05 Feb 2011, 22:29

so:
1 bit shift instruction is valid on 8086.
cl shift is valid on 8086
only 8086 doesnt mask bits, other cpus mask 5 (wich is kind of strange on cpu that doesnt even have idea about 32bit registers)
on 80286 i can shift 31 times, so what? After 16 times its useless.

btw, why call 80268 268 instead of 80286? It can be confusing. And it was to me some time ago, i though its other cpu.

05 Feb 2011, 22:29

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20630
Location: In your JS exploiting you and your system

revolution 06 Feb 2011, 01:07

b1528932 wrote:

on 80286 i can shift 31 times, so what? After 16 times its useless.

You need 5 bits to store the number 16.

06 Feb 2011, 01:07

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