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vid
Verbosity in development


Joined: 05 Sep 2003
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vid
well, if you want to solve it this way, then:

"optimize" :] it's in "use16" manner.

also allow "optimize on" (= "optimize") and "optimize off" to allow optimization on part of code and disallow elsewhere.

btw: "optimization" or "optimalization"?
Post 15 Dec 2005, 22:03
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution
Quote:
btw: "optimization" or "optimalization"?
I think optimisation (with an S), hehe, is best.
Post 16 Dec 2005, 13:19
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution
LEA revisited:

I have improved and updated the macro to the following:
Code:
macro lea [stuff] {
   common
   local b1,b2,b3
   virtual
      b1=0
      b2=0
      lea stuff
      if ($-$$)=2
         load b1 byte from $$
         load b2 byte from $$+1
      else if ($-$$)=3
         load b1 byte from $$
         load b2 byte from $$+1
         load b3 byte from $$+2
         if ~(b1=8dh & (b2 and 307o)=004o & b3=24h) & \ ;lea reg,[esp]
            ~(b1=8dh & (b2 and 307o)=105o & b3=00h)     ;lea reg,[ebp]
                b1=0
         end if
      end if
   end virtual
   b3=(b2 and 70o) shr 3
   if b1=08dh
      if ~((b2 and 7o)=b3)
         db 08bh,b2 or 300o
      else
         ;do nothing
      end if
   else
      lea stuff
   end if
}    
Now it catches all the possible cases and improves the encoding accordingly

I testesd it with this:
Code:
irp reg1,eax,ebx,ecx,edx,esi,edi,ebp,esp {
  irp reg2,eax,ebx,ecx,edx,esi,edi,ebp,esp {
    lea reg1,[reg2]
    lea reg1,[reg2+1]
    if ~ reg2 eq esp
      lea reg1,[reg1+reg2]
      lea reg1,[reg2+reg2]
      lea reg1,[reg1+reg2+1]
      lea reg1,[reg2+reg2+1]
    end if
    if ~ reg1 eq esp
      lea reg1,[reg2+reg1]
      lea reg1,[reg1+reg1]
      lea reg1,[reg2+reg1+1]
      lea reg1,[reg1+reg1+1]
    end if
  \}
}    
Post 18 Dec 2005, 03:14
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid
by the way, with thinking this way you also can make
Code:
or [memory],<0-255>
and [memory],<-128..-1, not 0..127>
test [memory], ... same ...    

use "mem8, imm8" form without error.
Post 19 Dec 2005, 15:41
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Octavio



Joined: 21 Jun 2003
Posts: 366
Location: Spain
Octavio
Tomasz Grysztar wrote:
Do you have some nice proposal of directive that would turn on the "smart" optimizations?

optimize optimization_level,[list of aditional parameters]

Making optimizations using macros will slowdown very much the assembler ,i think is better to implement it internally, using a directive to
specify with kind of optimizations can be done.
Post 19 Dec 2005, 16:44
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid
Ocatvio: not that... let's not make FASM overfeatured, it's simplicity is it's main advatantage over other ASMs.

I think optimization macros are sufficent solution. When your project is done, in final compilation you just include these macros (they shouldn't cause any new bugs if you code smart) and wait few seconds longer... no problem
Post 19 Dec 2005, 17:44
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution
I have added a few more cases to the test macro:
Code:
macro test op,val 
{ 
  addr@test equ 
  match [addr], op \{ addr@test equ addr \} 
  match size [addr], op \{ addr@test equ addr \} 
  match size =ptr addr, op \{ addr@test equ addr \} 
  if val eqtype 0 
    virtual at 0 
      test op,val 
      repeat $ 
        load opcode@test byte from %-1 
        if opcode@test <> 66h & opcode@test <> 67h & \
           opcode@test <> 26h & opcode@test <> 2eh & \
           opcode@test <> 36h & opcode@test <> 3eh
          break 
        end if 
      end repeat 
    end virtual 
    if opcode@test = 0F7h & ~ addr@test eq 
      if val = val and 7Fh 
        test byte [addr@test],val 
      else if val = val and 7F00h 
        test byte [addr@test+1],val shr 8 
      else if val = val and 7F0000h 
        test byte [addr@test+2],val shr 16 
      else if val = val and 0FF000000h 
        test byte [addr@test+3],val shr 24 
      else if val = val and 07FFFh 
        test word [addr@test],val
      else if val = val and 07FFF00h 
        test word [addr@test+1],val shr 8
      else if val = val and 0FFFF0000h 
        test word [addr@test+2],val shr 16 
      else 
        test op,val 
      end if 
    else if op eq eax & val = val and 7Fh 
      test al,val 
    else if op eq eax & val = val and 7F00h 
      test ah,val shr 8 
    else if op eq ebx & val = val and 7Fh 
      test bl,val 
    else if op eq ebx & val = val and 7F00h 
      test bh,val shr 8 
    else if op eq ecx & val = val and 7Fh 
      test cl,val 
    else if op eq ecx & val = val and 7F00h 
      test ch,val shr 8 
    else if op eq edx & val = val and 7Fh 
      test dl,val 
    else if op eq edx & val = val and 7F00h 
      test dh,val shr 8 
    else if op eq ax & val = val and 7Fh 
      test al,val 
    else if op eq ax & val = val and 0FF00h 
      test ah,val shr 8 
    else if op eq bx & val = val and 7Fh 
      test bl,val 
    else if op eq bx & val = val and 0FF00h 
      test bh,val shr 8 
    else if op eq cx & val = val and 7Fh 
      test cl,val 
    else if op eq cx & val = val and 0FF00h 
      test ch,val shr 8 
    else if op eq dx & val = val and 7Fh 
      test dl,val 
    else if op eq dx & val = val and 0FF00h 
      test dh,val shr 8 
    else 
      test op,val 
    end if 
  else 
    test op,val 
  end if 
}    
Post 20 Dec 2005, 01:56
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Octavio



Joined: 21 Jun 2003
Posts: 366
Location: Spain
Octavio
vid wrote:
Ocatvio: not that... let's not make FASM overfeatured, it's simplicity is it's main advatantage over other ASMs.

Then use DOS debug Smile
Quote:

When your project is done, in final compilation you just include these macros (they shouldn't cause any new bugs if you code smart)

but anybody can't code smart enought and when you add the optimizations to assemble a large project ,you will have a lot of bugs and no idea about were they are. another problem is that macros needs additional memory. Well ... that´s the opinion of someone that dislikes macros.
Post 20 Dec 2005, 12:24
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid
can you give some example when it will cause bug?
Post 20 Dec 2005, 14:21
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 7724
Location: Kraków, Poland
Tomasz Grysztar
On the other hand, the plus of macros is: it's easier to modify the package to use only the optimizations you want, add your own, etc.
Post 20 Dec 2005, 16:00
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 17279
Location: In your JS exploiting you and your system
revolution
Another revisit for "lea".

Added optimisation for "lea reg,[immediate]"
Code:
macro lea [stuff] {
  common
  local b1,b2,b3,addr@lea
  addr@lea equ
  match reg=,[addr],stuff\{addr@lea equ addr\} 
  match reg=,size[addr],stuff\{addr@lea equ addr\} 
  match reg=,size =ptr addr,stuff\{addr@lea equ addr\} 
  virtual
    b1=0
    b2=0
    lea stuff
    if ($-$$)=2
      load b1 byte from $$
      load b2 byte from $$+1
    else if ($-$$)=3
      load b1 byte from $$
      load b2 byte from $$+1
      load b3 byte from $$+2
      if ~(b1=8dh & (b2 and 307o)=004o & b3=24h) & \ ;lea reg,[esp]
         ~(b1=8dh & (b2 and 307o)=105o & b3=00h)     ;lea reg,[ebp]
        b1=0
      end if
    else if ($-$$)=6 & ~addr@lea eq
      load b1 byte from $$
      load b2 byte from $$+1
      if b1=8dh & (b2 and 307o)=005o ;lea reg,[immediate]
        b1=100h
      else
        b1=0
      end if
    end if
  end virtual
  if b1=08dh
    if ~((b2 and 7o)=((b2 and 70o) shr 3))
      db 08bh,b2 or 300o
    else
      ;do nothing
    end if
  else if b1=100h
    db 0b8h or ((b2 and 70o) shr 3)
    dd addr@lea
  else
    lea stuff
  end if
}    
Post 20 Dec 2005, 16:32
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 17279
Location: In your JS exploiting you and your system
revolution
One more minor change to "test".

With the extra brackets it now works with constructs like "test eax,value1+value2"
Code:
macro test op,val
{
  addr@test equ
  match [addr], op \{ addr@test equ addr \}
  match size [addr], op \{ addr@test equ addr \}
  match size =ptr addr, op \{ addr@test equ addr \}
  if val eqtype 0
    virtual at 0
      test op,val
      repeat $
        load opcode@test byte from %-1
        if opcode@test <> 66h & opcode@test <> 67h & \
           opcode@test <> 26h & opcode@test <> 2eh & \
           opcode@test <> 36h & opcode@test <> 3eh
          break
        end if
      end repeat
    end virtual
    if opcode@test = 0F7h & ~ addr@test eq
      if val = (val) and 7Fh
        test byte [addr@test],val
      else if val = (val) and 7F00h
        test byte [addr@test+1],(val) shr 8
      else if val = (val) and 7F0000h
        test byte [addr@test+2],(val) shr 16
      else if val = (val) and 0FF000000h
        test byte [addr@test+3],(val) shr 24
      else if val = (val) and 07FFFh
        test word [addr@test],val
      else if val = (val) and 07FFF00h
        test word [addr@test+1],(val) shr 8
      else if val = (val) and 0FFFF0000h
        test word [addr@test+2],(val) shr 16
      else
        test op,val
      end if
    else if op eq eax & val = (val) and 7Fh
      test al,val
    else if op eq eax & val = (val) and 7F00h
      test ah,(val) shr 8
    else if op eq ebx & val = (val) and 7Fh
      test bl,val
    else if op eq ebx & val = (val) and 7F00h
      test bh,(val) shr 8
    else if op eq ecx & val = (val) and 7Fh
      test cl,val
    else if op eq ecx & val = (val) and 7F00h
      test ch,(val) shr 8
    else if op eq edx & val = (val) and 7Fh
      test dl,val
    else if op eq edx & val = (val) and 7F00h
      test dh,(val) shr 8
    else if op eq ax & val = (val) and 7Fh
      test al,val
    else if op eq ax & val = (val) and 0FF00h
      test ah,(val) shr 8
    else if op eq bx & val = (val) and 7Fh
      test bl,val
    else if op eq bx & val = (val) and 0FF00h
      test bh,(val) shr 8
    else if op eq cx & val = (val) and 7Fh
      test cl,val
    else if op eq cx & val = (val) and 0FF00h
      test ch,(val) shr 8
    else if op eq dx & val = (val) and 7Fh
      test dl,val
    else if op eq dx & val = (val) and 0FF00h
      test dh,(val) shr 8
    else
      test op,val
    end if
  else
    test op,val
  end if
}    
Post 20 Dec 2005, 16:32
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MazeGen



Joined: 06 Oct 2003
Posts: 975
Location: Czechoslovakia
MazeGen
I don't know how your macro works exactly, but it seems you are testing here the prefixes:
Code:
        if opcode@test <> 66h & opcode@test <> 67h & \
           opcode@test <> 26h & opcode@test <> 2eh & \
           opcode@test <> 36h & opcode@test <> 3eh
          break
        end if
    

And what about FS: (64) and GS: (65)?
Post 21 Dec 2005, 09:13
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 17279
Location: In your JS exploiting you and your system
revolution
Quote:
And what about FS: (64) and GS: (65)?
Thanks for spotting that.

You are correct, we can add this line in the middle:
Code:
opcode@test <> 64h & opcode@test <> 65h & \    
Post 21 Dec 2005, 14:35
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OzzY



Joined: 19 Sep 2003
Posts: 1029
Location: Everywhere
OzzY
I think FASM should always generate the exact intructions that the programmer asked for. And the programmer can do these optimizations with the help of macros (the case of the test instruction).
Also, have some kind of .OPTIMIZE directive telling to optimize or not would be cool.

I was thinking, why not add some kind of listing generated after assembly of the source? This way the programmer could compare the source code with the hex opcodes in the listing and see if something is not what he expected.
(I would really like this feature, expecially for learn how opcodes are organized)

Thanks!

* sorry for my bad english
Post 03 Mar 2006, 02:46
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 17279
Location: In your JS exploiting you and your system
revolution
Quote:
think FASM should always generate the exact intructions that the programmer asked for.
If you regularly use a disassembler and get confused by not seeing what you expect in the listing then such optimisations might perhaps hinder your progress.

In a way it can also depend on how you want to define "instruction". Consider 'test byte[var],40h' and 'test dword[var],40h'. They are funtionally the same but semantically they are different. Does 'instruction' mean the function performed or the mnemonics that the programmer typed? The answer is somewhat philosophical. Some consider the extra program bytes used to be helpful during disassembly others consider them to be a waste of precious resources during execution.

Like you say, a directive like .OPTIMIZE might be useful to some people. Well you can always do this:
Code:
macro .OPTIMIZE {include 'optimizing_macros.inc'}    


My personal feeling is the more the software can optimise for me then the less work I have to do. I rarely use a disassembler on my code anyway so as long as the functionality does not change then I don't care what hex bytes are generated.
Post 03 Mar 2006, 05:45
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7105
Location: Slovakia
vid
and there goes your optimization, with x86-64...
Razz

btw, "test dword [(page shl 12) + 0FFFh], 1" is not same as "test byte [(page shl 12) + 0FFFh], 1", i hope you see why
Post 28 Sep 2006, 12:25
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 17279
Location: In your JS exploiting you and your system
revolution
Quote:
btw, "test dword [(page shl 12) + 0FFFh], 1" is not same as "test byte [(page shl 12) + 0FFFh], 1", i hope you see why
Good point. Fortunately this only affects system programming issues. Usually, for any normally coded program the dword would be aligned properly and thus not cause the extra page hit. If this is desired behaviour then put in a capital letter somewhere, eg. "Test", with an appropriate comment to note that special use and the reason why one might need such a thing.
Post 28 Sep 2006, 15:02
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vid
Verbosity in development


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Posts: 7105
Location: Slovakia
vid
and another good point is x86-64 processor Razz
Post 28 Sep 2006, 16:04
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 17279
Location: In your JS exploiting you and your system
revolution
Quote:
x86-64 processor
I don't get your meaning here. What company makes that processor? It 'aint made by Intel or AMD.
Post 28 Sep 2006, 23:03
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