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ouadji



Joined: 24 Dec 2008
Posts: 1081
Location: Belgium
ouadji

When this will be allowed ? please Intel ... Confused
Code:
callcc  ; conditional call

jcc absolute indirect
    

and you, which additional instructions would you like to use ?

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Post 14 Dec 2010, 23:57
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Coty



Joined: 17 May 2010
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Coty
ouadji wrote:
and you, which additional instructions would you like to use ?

I'd like all JMP instruction to be added with Call Very Happy

CE - Call if equal
CNE -- Call Not equal
... ect. ect.
Post 15 Dec 2010, 00:06
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution
If you add callcc then you should also all pushcc so that stdcall convention can be met. Then you would also have to add addcc and subcc so that ccall convention can still be met. Plus you would have to make sure that all subroutines return the flags unaltered so that subsequent instructions will get the proper flag values.

BTW: Being practical about it (rather than just mentally masturbating) where would you suggest these new instructions be put in the opcode map? It is not trivial to simply add instructions as you feel like it.
Post 15 Dec 2010, 00:16
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edemko



Joined: 18 Jul 2009
Posts: 549
edemko
i'd like seeing sh(l)rd reg,[mem],count
normal cmovc
cool unsigned mul and div
mov [mem],[mem]
~30% of code are movement ?
maybe smth else
Post 15 Dec 2010, 05:07
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Tyler



Joined: 19 Nov 2009
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Tyler
mentally... Confused
Post 15 Dec 2010, 05:52
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bitRAKE



Joined: 21 Jul 2003
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bitRAKE
CALLcc is only marginally useful where PROCs have the same interface semantics.

Usually, a structure is being created from multiple sources, and putting an address to that structure in a register is less overhead than a bunch of MOV [mem],[mem] instructions.

I'd like to see the opposite of PMOVMSKB: PMSKMOVB - bits of register are moved into high bits of (X)MMn bytes. Acts as a scatter instructions for bits. Too bad it's inclusion cannot be retroactive, lol.

PALIGNL - just because symmetry is good.

How about a RANDOM instruction? Real noise - some processors already support it.

POPCNT was a great addition.

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Post 15 Dec 2010, 07:08
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ouadji



Joined: 24 Dec 2008
Posts: 1081
Location: Belgium
ouadji

revolution,

Quote:

If you add callcc then you should also all pushcc so that stdcall convention
Indeed, you're right revolution.
Quote:

rather than just mentally masturbating
but as often happens, this very elegant way to formulate his ideas!
A socio-cultural difference ? or maybe a internet effect ?
... or both ?

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Post 15 Dec 2010, 09:45
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution
Well of you are genuinely serious about needing callcc then you have to do two things:

1) Show a compelling usage case where callcc would be the only sensible option. And,
2) Show how to encode it in a sane way without further messing up the already badly messed up x86 encoding.
Post 15 Dec 2010, 11:23
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shoorick



Joined: 25 Feb 2005
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shoorick
ouadji wrote:

When this will be allowed ? please Intel ... Confused
Code:
callcc  ; conditional call

jcc absolute indirect
    

and you, which additional instructions would you like to use ?
you, guys, realy need some chips like 8080/8085/z80 (they have conditional call and conditional return Wink )
Very Happy

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Post 15 Dec 2010, 11:54
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revolution
When all else fails, read the source


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revolution
shoorick wrote:
you, guys, realy need some chips like 8080/8085/z80 (they have conditional call and conditional return
ARM also. Conditional everything (almost). Razz Cool
Post 15 Dec 2010, 12:06
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shoorick



Joined: 25 Feb 2005
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shoorick
very nice. it is nice feature in real, as well as conditional movs. maybe i should read some about ARM guts Smile
Post 15 Dec 2010, 12:21
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ouadji



Joined: 24 Dec 2008
Posts: 1081
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ouadji
Quote:

Show a compelling usage case where callcc would be the only sensible option
not "only", but simply "better"
Code:
      btr     edx,18
      jc      A

       call ...   ;callnc

A:
    
this would avoid a break in code sequence.

but, once again, indeed, this raises the problem of pushcc for passing parameters.
once again, i'm agree. I also think that this is the main reason for the lack of a such opcode.

Being right does not allow to say everything.
let's be courteous! thank you revolution.

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Post 15 Dec 2010, 12:38
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution
ouadji: You have to go further and show where the above code sequence is used -- give it some context. Isolated code sequences do not show compelling cases. You also have to show how the code sequence is important enough to warrant inventing special instructions to support it. Plus you have to show how using jcc is not sufficient enough to solve the problem. Remember that the CPUs have branch prediction.
Post 15 Dec 2010, 12:46
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Tomasz Grysztar



Joined: 16 Jun 2003
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Tomasz Grysztar
Funny conincidence - just a few weeks ago I wrote a "callCC" macro for ender, as he wanted to put that instead of "jmpCC" to a common error handler, where he put INT3 and the he wanted to see in OllyDbg where it came from. Of course he could create a separate handler for each error and that would be the right thing to do, but as we were in hurry, replacing all conditional jumps with conditional calls was a nice and quick solution - you had the address of where the error came from visible in debugger. And for one-time debugging the stack pollution was not a problem.
Post 15 Dec 2010, 13:14
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Tomasz Grysztar



Joined: 16 Jun 2003
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Tomasz Grysztar
bitRAKE wrote:
How about a RANDOM instruction? Real noise - some processors already support it.
Intel stated RDRAND instruction (hardware generated) will be available in a "Post-32nm" generation of processors (you can find it in chapter 7 of AVX reference.
fasm is able to encode RDRAND since 1.69.15 version.
Post 15 Dec 2010, 13:18
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ouadji



Joined: 24 Dec 2008
Posts: 1081
Location: Belgium
ouadji

revolution, there is always a way to do otherwise!

Code:
      btr     edx,18 
     push A
      jnc  B

  add esp,4
A:     ;...


;---------------
B:      ;...
        ret
;---------------

    

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Post 15 Dec 2010, 13:24
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