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ishkabible



Joined: 13 Sep 2010
Posts: 54
ishkabible 15 Nov 2010, 22:05
well i think my subject explains it fairly well. what is the point of nop? there must be a reason for it or else it wouldn't be there right.
Post 15 Nov 2010, 22:05
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vid
Verbosity in development


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vid 15 Nov 2010, 23:41
In the original machine, one byte nop is simply different name for "xchg ax, ax" instruction. Similar to "mov ax, ax", etc. If it wasn't there, there would have to be some specific handling for this particular opcode.
Post 15 Nov 2010, 23:41
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mindcooler



Joined: 01 Dec 2009
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mindcooler 16 Nov 2010, 07:37
1. to take up space
2. to eat up cpu time
Post 16 Nov 2010, 07:37
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bitRAKE



Joined: 21 Jul 2003
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bitRAKE 16 Nov 2010, 10:16
It simplified an orthogonal instruction layout within the processor circuitry.
Post 16 Nov 2010, 10:16
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sinsi



Joined: 10 Aug 2007
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sinsi 16 Nov 2010, 10:28
Well there was a cpu (pdp-10) that had "jump always" and "jump never" instructions. It's all about symmetry...

edit: http://en.wikipedia.org/wiki/PDP-10#Instructions
Post 16 Nov 2010, 10:28
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Tomasz Grysztar



Joined: 16 Jun 2003
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Tomasz Grysztar 16 Nov 2010, 10:39
Note that in modern x86 processors we have not only the "90" NOP, but also "0F 1F /0".
Sometimes new purposes emerge over time for something that initially was not so useful.
Post 16 Nov 2010, 10:39
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MazeGen



Joined: 06 Oct 2003
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MazeGen 16 Nov 2010, 11:08
Does anyone know when the XCHG eAX, eAX became real architectural NOP (i.e. when the Intel CPU stopped to touch eAX)? I'd say it was either 386 or 486, but I found no clear evidence.
Post 16 Nov 2010, 11:08
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asmhack



Joined: 01 Feb 2008
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asmhack 16 Nov 2010, 12:23
patching maybe ? Laughing
Post 16 Nov 2010, 12:23
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ctl3d32



Joined: 30 Dec 2009
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ctl3d32 16 Nov 2010, 20:46
asmhack wrote:
patching maybe ? Laughing


yes!!!!!! Laughing
Post 16 Nov 2010, 20:46
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ishkabible



Joined: 13 Sep 2010
Posts: 54
ishkabible 16 Nov 2010, 21:40
symmetry makes sense. i read some where that there was a logical way to get the different instructions values by just knowing some base value. i didn't look any further into it. it makes sense that in creating a logical intuitive way to derive the values of the instructions that some useless ones would occur. so dose the processor actually move ax to ax? or dose it just disregard things of this nature?
Post 16 Nov 2010, 21:40
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baldr



Joined: 19 Mar 2008
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baldr 16 Nov 2010, 22:03
ishkabible,

Until speculative execution has been introduced (P6), that has no real effect. Keyword is dependency.
Post 16 Nov 2010, 22:03
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b1528932



Joined: 21 May 2010
Posts: 287
b1528932 17 Nov 2010, 23:24
i think they introduced real nop in long mode.
In 32bit mode it was just xchg eax, eax.
Post 17 Nov 2010, 23:24
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baldr



Joined: 19 Mar 2008
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baldr 18 Nov 2010, 06:52
b1528932,

You think wrong. nop r/m instruction is present since later P4; it works perfectly even in real-address mode.

Why do we need manuals? We can just have opinions. Wink
Post 18 Nov 2010, 06:52
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luke77



Joined: 14 May 2010
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luke77 18 Nov 2010, 11:30
Nops are pretty interesting.

They also get used as "fillers" and as one byte instructions.

Microsoft worked in conjunction with Intel to develop it.

It means No Other Plan. Smile

Have a great day,
Andy

http://intouch.org/magazine/daily-devotional
http://www.happynews.com

[/b]
Post 18 Nov 2010, 11:30
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bitRAKE



Joined: 21 Jul 2003
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bitRAKE 19 Nov 2010, 03:35
"No Other Plan" that's very funny, luke77. Very Happy FYI: NOPs existed before Microsoft did, nor was Intel the first to document NOP as an instruction. (PDP-8, The Small Computer Handbook (1966 Edition), Sections 1 and 2 (top of page 63), probably earlier references exist; but Intel was founded in 1968 and Microsoft in 1975.)
Quote:
NO OPERATION (NOP)

Octal Code: 7000

Indicators: OPR, FETCH, EXECUTE, END

Execution Time: 28 microseconds

Parity Test: instruction

Operation: This command causes a 1 instruction delay in the program (28 microseconds) and then the next sequential instruction is initiated. This command is used to add execution time to a program, such as to synchronize subroutine or loop timing with peripheral equipment timing.

Symbol: None
Post 19 Nov 2010, 03:35
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luke77



Joined: 14 May 2010
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luke77 19 Nov 2010, 04:07
Thanks bitRAKE.

I was a class clown in my Catholic High School.

I still haven't grown up.

Andy Laughing
Post 19 Nov 2010, 04:07
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vid
Verbosity in development


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vid 19 Nov 2010, 10:37
luke77: Was it Roman Catholic or Greek Catholic?
Post 19 Nov 2010, 10:37
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luke77



Joined: 14 May 2010
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luke77 19 Nov 2010, 12:27
vid wrote:
luke77: Was it Roman Catholic or Greek Catholic?


Roman Catholic.

What are the differences?

I am a non-denominational Christian now.
Post 19 Nov 2010, 12:27
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution 23 Nov 2010, 14:54
MazeGen wrote:
Does anyone know when the XCHG eAX, eAX became real architectural NOP (i.e. when the Intel CPU stopped to touch eAX)? I'd say it was either 386 or 486, but I found no clear evidence.
I think it would be the introduction of RAX that forced the decoding of nop to be "real".
Post 23 Nov 2010, 14:54
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vid
Verbosity in development


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vid 24 Nov 2010, 00:04
revolution: I think sooner, during or early after pipelining was introduced, so that "xchg eax, eax" doesn't mark EAX as modified. But I never cared too much about optimization stuff, maybe generic xchg pipeline-optimization handling is smart enough not to cause problems with this?
Post 24 Nov 2010, 00:04
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