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mattst88



Joined: 12 May 2006
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mattst88
http://blogs.amd.com/developer/2010/08/18/3dnow-deprecated/

AMD is removing 3DNow! from future processors, which is an interesting, if not so surprising, development.

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Post 21 Aug 2010, 00:08
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LocoDelAssembly
Your code has a bug


Joined: 06 May 2005
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LocoDelAssembly
Wonder if they will use the opcode space for something else or will make it perpetually UD. If they'll use the space afterwards then this is probably the first good example of how bad is to check instruction set presence by attempting to use it and catch the UD exception to detect its absence instead of using the proper CPUID way.
Post 21 Aug 2010, 01:24
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Coty



Joined: 17 May 2010
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Coty
Wow... I don't like this. I mean I never used 3dnow!, and I never planed to, but this screws up backwards compatibility with older software...
Post 23 Aug 2010, 01:34
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windwakr



Joined: 30 Jun 2004
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windwakr
Coty wrote:
Wow... I don't like this. I mean I never used 3dnow!, and I never planed to, but this screws up backwards compatibility with older software...

Name one piece of software that would break because of this.


Unless a company wanted to only target specific AMD customers, I highly doubt there's any software that absolutely REQUIRES 3DNever! and would break without it.

I'm sure there's little programs here and there on the internet that won't function without it, but nothing that people would absolutely need to run.

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Post 23 Aug 2010, 04:49
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Madis731



Joined: 25 Sep 2003
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Madis731
And when the software was programmed correctly, it *detected* the presence of 3DNow! before executing code. Just like you would do with MMX/SSE.

I would update windwakr's sentence:
Name one piece of software that doesn't detect 3DNever! before executing. Smile
Post 23 Aug 2010, 18:52
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LocoDelAssembly
Your code has a bug


Joined: 06 May 2005
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LocoDelAssembly
The problem lies in HOW them detected the presence. Detecting #UD generation is potentially asking for trouble and detecting whether the CPU is K6-II or higher, or even detecting if it's AMD and ignore old chips will fail completely.

The last method of detection is quite possible that was employed by some, after all, is anyone in the world detecting SSE2 presence in 64-bit programs? What if Intel decides to remove all SSE once AVX is well established?
Post 23 Aug 2010, 21:02
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bitRAKE



Joined: 21 Jul 2003
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bitRAKE
Wonder if this foretells of another acquiesce by AMD? 3DNow! always seemed to lack momentum to me, and I was buying AMD CPU's at the time. Whereas x64 was a much larger effort - well thought out and executed. What of SSE5? It's now fragmented and less potent. How can it move beyond a couple niche markets?

It's a mature company which is (finally) able to make this decision, imho.
Post 24 Aug 2010, 04:13
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mattst88



Joined: 12 May 2006
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mattst88
bitRAKE wrote:
Wonder if this foretells of another acquiesce by AMD? 3DNow! always seemed to lack momentum to me, and I was buying AMD CPU's at the time. Whereas x64 was a much larger effort - well thought out and executed. What of SSE5? It's now fragmented and less potent. How can it move beyond a couple niche markets?

It's a mature company which is (finally) able to make this decision, imho.


Just FYI (maybe you know this already), AMD cancelled SSE5. See http://en.wikipedia.org/wiki/SSE5

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Post 25 Aug 2010, 15:43
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bitRAKE



Joined: 21 Jul 2003
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bitRAKE
I hope it isn't cancelled as Tomasz has already implemented XOP.
wikipedia wrote:
most of the instructions in the new revision are functionally identical to the original SSE5 specification - only the way the instructions are coded differs
...and the name of the instructions has changed. SSE5 was clearly announced prior to AVX. Yet, AMD continues to shift underneath the giant. This was not the way x64 came about.
Post 26 Aug 2010, 01:10
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution
LocoDelAssembly wrote:
Wonder if they will use the opcode space for something else or will make it perpetually UD. If they'll use the space afterwards then this is probably the first good example of how bad is to check instruction set presence by attempting to use it and catch the UD exception to detect its absence instead of using the proper CPUID way.
I think you have nothing to worry about. If they ever use the opcode space for something else then they would break far too many programs, people would complain that their CPU is broken and sales would decline until they "fixed" it.
Post 31 Aug 2010, 02:29
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rugxulo



Joined: 09 Aug 2005
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rugxulo
I thought Agner had complained that Intel and AMD weren't cooperating, hence the potential opcode space clash. So it would indeed not be surprising if they did reuse it for future (hopefully more popular) instructions, IMHO.
Post 01 Sep 2010, 01:47
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revolution
When all else fails, read the source


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revolution
rugxulo wrote:
I thought Agner had complained that Intel and AMD weren't cooperating, hence the potential opcode space clash. So it would indeed not be surprising if they did reuse it for future (hopefully more popular) instructions, IMHO.
I expect that would be for the SSE5/AVX thing where different instructions had the same encoding.

The 3DNow! instructions use an entirely different part of the opcode space. The space is unlikely to be useful for future upgrades anyway.
Post 01 Sep 2010, 01:55
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edfed



Joined: 20 Feb 2006
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edfed
i don't know what is 3Dnow, i have only intel CPU.
Post 01 Sep 2010, 22:33
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