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Teehee



Joined: 05 Aug 2009
Posts: 570
Location: Brazil
Teehee 18 Jul 2010, 22:07
hi.

1. All instructions with at least 1 operand have the ModR/M byte?
2. reg/op field in ModR/M refers to the first operand (ex: ADD op1, op2)?
3. r/m field to the second one? (or vice-versa?) (or neither?)
4. Whats the difference of use an opcode extention (ex. ADD (80)) or not (ex. ADD (03 or 05))?
5. For example, why does INC instruction in the format 40+rw, does not appear in Appendix A or B, in those encoding tables?

This is my first real contact with the manual, so i'm still confuse.

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Post 18 Jul 2010, 22:07
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baldr



Joined: 19 Mar 2008
Posts: 1651
baldr 18 Jul 2010, 22:55
Teehee,

  1. No. Many arithmetic/logical instructions have special encodings for acc, imm operands. Other notable examples are inc/dec reg and instructions with implicit operands, like in / out.
  2. No. Bit d (often bit 1) in opcode indicates whether destination is reg (d==1) or r/m (d==0).
  3. See above.
  4. add instruction opcode with first byte 80 corresponds to add r/m8, imm8, with 03 — to add reg, r/m, with 05 — to add acc, imm. I'd say they're completely different.
  5. How's that? inc is on pages A-10 and B-13, dec — on A-11 and B-12.
Post 18 Jul 2010, 22:55
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Teehee



Joined: 05 Aug 2009
Posts: 570
Location: Brazil
Teehee 18 Jul 2010, 23:09
hi baldr,
baldr wrote:

  1. How's that? inc is on pages A-10 and B-13, dec — on A-11 and B-12.

oh.. my Foxit finder didn't find it! i see it now! thanks! Embarassed
and thanks for reply!

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Post 18 Jul 2010, 23:09
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Teehee



Joined: 05 Aug 2009
Posts: 570
Location: Brazil
Teehee 18 Mar 2011, 16:50
Hello.

Quote:
Branch hint prefixes (2EH, 3EH) allow a program to give a hint to the processor about
the most likely code path for a branch
. Use these prefixes only with conditional
branch instructions (Jcc). Other use of branch hint prefixes and/or other undefined
opcodes with Intel 64 or IA-32 instructions is reserved; such use may cause unpre-
dictable behavior.

Hows that? i didn't understand.
Post 18 Mar 2011, 16:50
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bitRAKE



Joined: 21 Jul 2003
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bitRAKE 19 Mar 2011, 03:55
One of the solutions to branch prediction penalties was to allow the program to explicitly specify the likely path. This was supported on very few processor models because (it's a dumb idea and) the pipeline was shorted and an improved predictor makes it superfluous.

One prefix means branch is likely taken and other not-taken.
Post 19 Mar 2011, 03:55
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