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Index > OS Construction > protected mode > long mode

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a115433



Joined: 05 Mar 2010
Posts: 144
a115433
how can i switch to long mode?
i need page in manual - sorry, cant find it myself.

...and im not interested in switching directly from real mode.
Post 13 Mar 2010, 15:55
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zhak



Joined: 12 Apr 2005
Posts: 490
Location: Belarus
zhak
http://flatassembler.net/examples/longmode.zip - example by Tomasz

btw, don't forget that google is your friend Wink
Post 13 Mar 2010, 16:20
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a115433



Joined: 05 Mar 2010
Posts: 144
a115433
thx. can i use PSE to get only 1 plm4 table with 1 giga page?
just to make it easy for testing.
Post 13 Mar 2010, 17:27
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cod3b453



Joined: 25 Aug 2004
Posts: 619
cod3b453
You should check CPUID 0x80000001 EDX[26] is set. (see AMD Vol 2 #24593 Section 5.3 pp. 128-)

Also, it's a good idea to map the first 4GB, especially if you're using VESA.
Post 13 Mar 2010, 20:52
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a115433



Joined: 05 Mar 2010
Posts: 144
a115433
; number of pages to map (1 MB)

bullshit. manual cant agree with you, its 4kilo page.


PDPTE PS = 1 giga
PDE PS = 2 mega
PTE = 4 kilo

ia32e doesnt support 1 mega
Post 13 Mar 2010, 21:53
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a115433



Joined: 05 Mar 2010
Posts: 144
a115433
Code:
ORG 0x7c00

       USE16

   cli                             ; disable the interrupts, just in
                                   ; case they are not disabled yet

        lgdt    [cs:GDTR]           ; load GDT register

     mov     eax,cr0                 ; switch to protected mode
  or      al,1
        mov     cr0,eax

 jmp     16:pm_start



GDTR:                                        ; Global Descriptors Table Register
  dw 31                          ; limit of GDT (size minus one)
  dq GDT                             ; linear address of GDT

GDT:
     db 0,0,0,0,0,0,0,0
    db 0xFF, 0xFF,0,0, 0, 10010010b,10001111b, 0
    db 0xFF, 0xFF,0,0,0, 10011010b,11001111b, 0
    db 0, 0, 0,0, 0,10011010b,10100000b, 0

 
    USE32

pm_start:

      mov     ax,8
        mov     ds,ax

   mov     eax,cr4
     or      eax,0x20
    mov     cr4,eax                 ; enable physical-address extensions


        
    
    mov     dword [0x70000],0x71000 + 3      ; PDPTE
    mov     dword [0x71000],0x72000 + 3 ; PDE
   mov     dword [0x72000],0x73000 + 3 ; PTE



       
    mov eax,4096*7
      or eax,3
    mov dword [0x73000+7*8],eax
 

        mov eax,4096*0xB8
           or eax,3
    mov dword [0x73000+0xB8*8],eax
      
    



        mov     eax,0x70000
 mov     cr3,eax                 ; load page-map level-4 base

    mov     ecx,0xC0000080 ; EFER MSR
   rdmsr
       or      eax,0x100               ; enable long mode
  wrmsr

   mov     eax,cr0
     or      eax,0x80000000
      mov     cr0,eax                 ; enable paging

 jmp     24:long_start

       USE64

long_start:
        mov     rax,'L O N G '
    mov     [0x0B8000],rax

  cli
 hlt

db 510 - ($ - $$) dup 0, 0x55, 0xAA 

    



work.
now i want to try 1 giga page.
but it doesnt work. i setup PDPTE in PML4, PDPTE point to 10000011b.
...[/code]
Post 13 Mar 2010, 22:09
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a115433



Joined: 05 Mar 2010
Posts: 144
a115433
i think i understand it now.
all structures are same. PS indicate if page is mapped, or next entry.

4 kilo and 2 mega - done.
1 giga - doesnt work.


affffff this manual is such a pain in the ass.
Post 13 Mar 2010, 22:19
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cod3b453



Joined: 25 Aug 2004
Posts: 619
cod3b453
What it means is the longmode example given maps 1MB by creating 256 4kB pages = 1024kB mapped memory.

To get 1GB pages you simply add the direct aligned mappings to PDPE instead. e.g.
Code:
xor edx,edx
mov eax,10000011b

mov [0x0000000000071000],eax ; (NX bit 63), 1st GB, direct map bit 7, Writeable bit 2, present bit 1
mov [0x0000000000071004],edx    
Post 13 Mar 2010, 22:23
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a115433



Joined: 05 Mar 2010
Posts: 144
a115433
Code:
 
mov dword [0x70000],0x71000 + 3      ;PDPTE
mov  dword [0x70004],0 ;PDPTE
;mov        dword [0x71000],0x72000 + 3 ; PDE
;mov       dword [0x71004],0
;mov       dword [0x72000],0x73000 + 3 ; PTE
;mov       dword [0x72004],0 ; PTE

;mov dword [0x72000],10000011b
;mov dword [0x72004],0
     
mov dword [0x71000],10000011b
mov dword [0x71004],0    


what is wrong?
when i enable 2 mega entry - uit works. 4 kilo - also work.
1 giga - exception (i dont have idt).


bochs support 1gb page, i used cpuid.
Post 13 Mar 2010, 22:31
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cod3b453



Joined: 25 Aug 2004
Posts: 619
cod3b453
You might need to set bit 12 as well - try using 0001000010000011b instead
Post 13 Mar 2010, 23:45
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a115433



Joined: 05 Mar 2010
Posts: 144
a115433
doesnt work Sad
Post 13 Mar 2010, 23:52
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narada



Joined: 15 Feb 2008
Posts: 77
Location: Ukraine, Dnepropetrovsk
narada
if Done(a115433.1Gb_page) then
begin
a115433.Please.zipAndPost("source_done.zip")
end;

WriteLn('Thank you');
Post 14 Mar 2010, 10:31
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smiddy



Joined: 31 Oct 2004
Posts: 559
smiddy
LOL
Post 14 Mar 2010, 12:34
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a115433



Joined: 05 Mar 2010
Posts: 144
a115433
ok i post if you want, but i cant make it fork for unknown reason.
i really dont know why 1 GB page doesnt work!
Post 14 Mar 2010, 12:38
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baldr



Joined: 19 Mar 2008
Posts: 1651
baldr
a115433,

Check Bochs log to be sure that 1G paging support: yes. It appears to be compile-time option, default: no.
Post 14 Mar 2010, 13:01
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a115433



Joined: 05 Mar 2010
Posts: 144
a115433
1G paging support: no
thx.

but cpuid show that it support it.
ok nvm, do you know where will i get version with 1G page support?
or i will use virtualbox to test 1G pages, im simply unable to compile it.
Post 14 Mar 2010, 13:24
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 17716
Location: In your JS exploiting you and your system
revolution
a115433 wrote:
affffff this manual is such a pain in the ass.
I think you are using it wrongly. Neutral
Post 14 Mar 2010, 16:50
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baldr



Joined: 19 Mar 2008
Posts: 1651
baldr
a115433,

I've compiled Bochs 2.4.2 with #define BX_SUPPORT_1G_PAGES 1, though too many 64->32 conversion warnings were issued. It looks suspicious.
Post 14 Mar 2010, 17:27
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