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Index > Compiler Internals > Monitor /Mwait instructions SSE3

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hopcode



Joined: 04 Mar 2008
Posts: 563
Location: Germany
hopcode 12 Jan 2010, 22:23
simple question, while coding 0F opcodes:

according this Intel example
http://software.intel.com/en-us/articles/how-to-use-the-monitor-and-mwait-streaming-simd-extensions-3-instructions/

MONITOR EAX,ECX,EDX
MWAIT EAX,ECX

But in the docs (A-M) instruction ref, there is no register
quoted, also i thought they should be implicit.

Should not be the syntax simply
MONITOR
MWAIT
Question

Cheers,
hopcode
Post 12 Jan 2010, 22:23
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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revolution 12 Jan 2010, 22:34
The example given in the MWAIT description (253666-031, A-M June 2009) shows the syntax with registers given explicitly.
Post 12 Jan 2010, 22:34
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LocoDelAssembly
Your code has a bug


Joined: 06 May 2005
Posts: 4624
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LocoDelAssembly 12 Jan 2010, 22:38
It doesn't work without operands for you?

This compiles just fine in FASMW 1.69.11
Code:
monitor
mwait
MONITOR EAX,ECX,EDX
MWAIT EAX,ECX    


What I've noticed is that it use the same encoding in all modes but probably that is right, the processor always use EAX in 16- and 32-bit modes.

Oh wait, there is probably a bug then, the explicit mode is encoded the same way in 64-bit mode even though it uses RAX actually, in that case it shouldn't compile.
Post 12 Jan 2010, 22:38
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LocoDelAssembly
Your code has a bug


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Posts: 4624
Location: Argentina
LocoDelAssembly 12 Jan 2010, 23:02
revolution, I've just realized I have exactly the manual you mention, but where did you see the explicit registers?

I only have this:
Quote:
Opcode Instruction 64-Bit
Mode
Compat/
Leg Mode
Description
0F 01 C9 MWAIT Valid Valid A hint that allow the processor to stop
instruction execution and enter an
implementation-dependent optimized state
until occurrence of a class of events.


[edit] Here I found the documentation on-line:
*MWAIT
*MONITOR

In both cases the operands are explicit.
[edit2]But those links point to old documentation, 64-bit is not mentioned there.
Post 12 Jan 2010, 23:02
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hopcode



Joined: 04 Mar 2008
Posts: 563
Location: Germany
hopcode 12 Jan 2010, 23:25
oops Very Happy
i have 253666-030US March 2009
and fasm 1-69.02

thanks for so fast answering !!!

(i am almost in test-phase with my new "cannot-resize-it-to-fit-512byte-LDE."
i will publish it on half february...and your tests are really welcomed.)


Greetings
hopcode
Post 12 Jan 2010, 23:25
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revolution
When all else fails, read the source


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revolution 13 Jan 2010, 00:29
LocoDelAssembly wrote:
revolution, I've just realized I have exactly the manual you mention, but where did you see the explicit registers?
In the example. Scroll down a few pages.
Post 13 Jan 2010, 00:29
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LocoDelAssembly
Your code has a bug


Joined: 06 May 2005
Posts: 4624
Location: Argentina
LocoDelAssembly 13 Jan 2010, 00:35
Oh yeah, I skipped it because I thought it was plain pseudo-code:
Code:
EAX = Logical Address(Trigger)
ECX = 0 (*Hints *)
EDX = 0 (* Hints *)
IF ( !trigger_store_happened) {
   MONITOR EAX, ECX, EDX
   IF ( !trigger_store_happened ) {
      MWAIT EAX, ECX
   }
}    
Post 13 Jan 2010, 00:35
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MazeGen



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MazeGen 13 Jan 2010, 10:34
Post 13 Jan 2010, 10:34
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