movq    xmm0,rdx
        movd    xmm0,edx
;        movq    rdx,xmm0
        db      66h,48h,0Fh,7Eh,0C2h
        movd    edx,xmm0
    

use64
movd eax,mm0    ;OK!
movd eax,xmm0   ;OK!
movq rax,mm0    ;OK!
;movq rax,xmm0  ;Why? Operand sized do not match

;Not even possible with some wierd formats:
;movd rax,mm0    ;OK! Invalid size of operand
;movd rax,xmm0   ;OK! Invalid size of operand
;movq eax,mm0    ;OK! Invalid size of operand
;movq eax,xmm0   ;OK! Invalid size of operand
    

db 66h
movq rax,mm0    ;OK!
    

OK, thanks - I have found the old thread and merged your new one into it - will look into the bug report later.

use64

movd xmm0, rax ; zero extended
movlhps xmm0, xmm1 ; low 64 bits to hi 64 bits, remainder unchanged

movhlps xmm0, xmm1 ; hi 64 to lo 64, remainder unchanged
movd rax, xmm0

movsd xmm0, xmm1 ; lo64 to lo64, remainder unchanged

movd mm0, rax

movd rax, mm0

mov xmm0l, xmm1l
mov xmm0l, xmm1h
mov xmm0h, xmm1l

movzx xmm0, rax

one other thing, these xmm and mmx opcodes are IMPOSSIBLE

to remember, perhaps it is better to extend eg the definitions of mov
and movzx:

eg

Quote:

mov xmm0l, xmm1l
mov xmm0l, xmm1h
mov xmm0h, xmm1l

movzx xmm0, rax

that would be much more useful and easy to remember

use32
 mov ax,bx   ;okay 16-bit move
 mov eax,ebx ;okay 32-bit move
use64
 mov eax,ebx ;upper 32 bits are cleared
 mov rax,rbx ;okay 64-bit move
;Should is be more like this?
 movzx eax,ebx ;This is what it exactly means 
    

lazer1 wrote:

one other thing, these xmm and mmx opcodes are IMPOSSIBLE

to remember, perhaps it is better to extend eg the definitions of mov
and movzx:

eg

Quote:

mov xmm0l, xmm1l
mov xmm0l, xmm1h
mov xmm0h, xmm1l

movzx xmm0, rax

that would be much more useful and easy to remember

But fasm follows Intel syntax so even if your suggestion really is "better" (by whatever criteria you decide) it is unlikely to used because it would be incompatible with standard Intel syntax.

Code:

 movzx eax,ebx ;This is what it exactly means     

 movzx rax,ebx    

use64
movzx rax,bx ;allowed
movzx rax,bl ;allowed
;movzx rax,ebx ; NOT allowed because:
mov   eax,ebx ; ...does the same thing 
    

oh yeah - sorry rax was meant to be there I got lost in this wierd syntax - though... isn't the very same line allowed ^o) ... hmm not exactly

Code:

use64
movzx rax,bx ;allowed
movzx rax,bl ;allowed
;movzx rax,ebx ; NOT allowed because:
mov   eax,ebx ; ...does the same thing 
    

erm, so I do partly agree with laser1 BUT the world is accustomed to Intel syntax and although you feel it sometimes too complicated, at the time of development they seeked for the best solution. Now that new technologies are coming and compatibility needs to remain...what's U gonna do?

fasm needs to keep track of which definitions are labels and which are other.

use64
virtual at $FFFFFFFFFFFFFF00
  someLabel:
end virtual
someValue = $FFFFFFFFFFFFDEAD

mov ebx, someLabel
mov eax, someValue    

fasm needs to keep track of which definitions are labels and which are other.

Don't expect the assembler to hold your hand.

Quote:

Don't expect the assembler to hold your hand.

But it already does it a little however, for example you are not allowed to XOR a label against a constant on a PE with fixups. I do understand that the XOR example is a sightly different category because the executable would randomly crash instead of having constant behavior (the crash depends on whether the expected virtual address space was satisfied or not), but since fasm already knows (internally) what is a label and what is not, (...)

symbol = $    

Yes, it will do a little bit of hand holding but I meant not the expect it to always do it. One should try to write code/labels etc. in such a way that hand holding won't be needed.

;==== "movd xmm,reg64" via fasm macros: =================


registers64old equ rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi
registers64new equ r8, r9, r10, r11, r12, r13, r14, r15
registers64xmmlo equ xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7
registers64xmmhi equ xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15


macro mod_rm mod_*, reg*
{
if reg in <al,ax,eax,rax,mm0,xmm0,r8,xmm8>

db (mod_ shl 3) or 0

else if reg in <cl,cx,ecx,rcx,mm1,xmm1,r9,xmm9>

db (mod_ shl 3) or 1

else if reg in <dl,dx,edx,rdx,mm2,xmm2,r10,xmm10>

db (mod_ shl 3) or 2

else if reg in <bl,bx,ebx,rbx,mm3,xmm3,r11,xmm11>

db (mod_ shl 3) or 3

else if reg in <ah,spl,sp,esp,rbx,mm4,xmm4,r12,xmm12>

db (mod_ shl 3) or 4

else if reg in <ch,bpl,bp,ebp,rbp,mm5,xmm5,r13,xmm13>

db (mod_ shl 3) or 5

else if reg in <dh,si,sil,esi,rsi,mm6,xmm6,r14,xmm14>

db (mod_ shl 3) or 6

else if reg in <bh,di,dil,edi,rdi,mm7,xmm7,r15,xmm15>

db (mod_ shl 3) or 7

else
display 'BUG: unrecognised register'
end if
}

macro mod_reg_rm mod_*, reg*, rm*
{
if reg in <al,ax,eax,rax,mm0,xmm0,r8,xmm8>

mod_rm (mod_ shl 3) or 0, rm

else if reg in <cl,cx,ecx,rcx,mm1,xmm1,r9,xmm9>

mod_rm (mod_ shl 3) or 1, rm

else if reg in <dl,dx,edx,rdx,mm2,xmm2,r10,xmm10>

mod_rm (mod_ shl 3) or 2, rm

else if reg in <bl,bx,ebx,rbx,mm3,xmm3,r11,xmm11>

mod_rm (mod_ shl 3) or 3, rm

else if reg in <ah,spl,sp,esp,rbx,mm4,xmm4,r12,xmm12>

mod_rm (mod_ shl 3) or 4, rm

else if reg in <ch,bpl,bp,ebp,rbp,mm5,xmm5,r13,xmm13>

mod_rm (mod_ shl 3) or 5, rm

else if reg in <dh,si,sil,esi,rsi,mm6,xmm6,r14,xmm14>

mod_rm (mod_ shl 3) or 6, rm

else if reg in <bh,di,dil,edi,rdi,mm7,xmm7,r15,xmm15>

mod_rm (mod_ shl 3) or 7, rm

else
display 'BUG: unrecognised register'
end if
}

macro movd_br rexr*, rexb*, xmm*, reg*
{
db 66h, 40h or 8h or (rexr shl 2) or rexb, 0fh, 6eh

mod_reg_rm 11b, xmm, reg
}

macro movd_b rexb*, xmm*, reg*
{
if xmm in <registers64xmmlo> ; rex.r==0
movd_br 0, rexb, xmm, reg
else if xmm in <registers64xmmhi> ; rex.r==1
movd_br 1, rexb, xmm, reg
else
movd xmm, reg
end if
}

macro movd xmm*, reg*
{
if reg in <registers64old> ; rex.b==0
movd_b 0, xmm, reg
else if reg in <registers64new> ; rex.b==1
movd_b 1, xmm, reg
else
movd xmm, reg
end if
}


;==============================================

if it CAN hold your hand it SHOULD