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Helle 09 Feb 2009, 16:26
Hallo,
please check PEXTRW. I think in 1.67.29 was it oK, with 1.67.30 I get another opcode (with another registers by dis-assembling). Still PEXTRB (new in 1.67.30). Thanks! Helle |
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09 Feb 2009, 16:26 |
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Tomasz Grysztar 09 Feb 2009, 17:04
You're right, I messed it up a bit. Silent update is coming.
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09 Feb 2009, 17:04 |
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revolution 09 Feb 2009, 17:06
Tomasz Grysztar wrote: Silent update is coming. |
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09 Feb 2009, 17:06 |
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Tomasz Grysztar 09 Feb 2009, 17:13
revolution wrote: Can I suggest a fourth digit to distinguish these versions. 1.67.30.1 Thanks, that's a good suggestion.  Though I only changed the number in the executable, the package is still called as it was.
Update is done, please re-download. |
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09 Feb 2009, 17:13 |
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MazeGen 09 Feb 2009, 17:30
Weird, I didn't see any problems with PEXTRW with 1.67.30.0. Oh well.
While testing, I found one bug, FASM 1.67.30.1 doesn't like 64-bit destination operand if source operand is MMX register: Code: use64 PEXTRW RAX, MM0, 1 |
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09 Feb 2009, 17:30 |
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Tomasz Grysztar 09 Feb 2009, 17:35
Hmm, I was under the impression that old form PEXTRW (0F C5) only allowed 32-bit GPR as destination. Perhaps I used outdated docs for this one.
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09 Feb 2009, 17:35 |
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MazeGen 09 Feb 2009, 17:35
revolution wrote:
Why not 1.67.31? Fourth digit looks a bit too much for me. And we still have 1.67.32 - 1.67.99 namespace until 1.68 is done. |
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09 Feb 2009, 17:35 |
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Tomasz Grysztar 09 Feb 2009, 17:37
MazeGen wrote: Why not 1.67.31? Fourth digit looks a bit too much for me. And we still have 1.67.32 - 1.67.99 namespace until 1.68 is done. I don't want the amount of packages on the server to grow too quickly with all the small mistake fixes. |
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09 Feb 2009, 17:37 |
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MazeGen 09 Feb 2009, 17:39
Tomasz Grysztar wrote: Hmm, I was under the impression that old form PEXTRW (0F C5) only allowed 32-bit GPR as destination. Perhaps I used outdated docs for this one. Well, it is a bit questionable. Intel just says "Extract the word specified by imm8 from mm and move it to reg, bits 15-0. The upper bits of r32 or r64 is zeroed" so actually I may be wrong here. EDIT: I was under impression that "PEXTRW RAX, XMM0, 1" works so I thought it should work with MM0 register as well. When I try it now, it doesn't work. Erm. |
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09 Feb 2009, 17:39 |
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edfed 09 Feb 2009, 19:44
i think fasm can be classified in two families.
stable version. and testing versions. then, for fasm 1.67.30 you can make it: fasm 1.67.30T for testings, will only be updated without changing the name. and fasm 1.67.30 for stable version that will never evolve. |
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09 Feb 2009, 19:44 |
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Tomasz Grysztar 10 Feb 2009, 11:03
MazeGen wrote: I was under impression that "PEXTRW RAX, XMM0, 1" works so I thought it should work with MM0 register as well. When I try it now, it doesn't work. Erm. Right, I broke it when I was correcting the previous one. 
Please try with 1.67.30.2 edfed wrote: i think fasm can be classified in two families. There already is such classification - the odd minor version numbers are development versions (like 1.67.x), and the even minor version number are the stable versions (1.66 and coming 1.6  . |
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10 Feb 2009, 11:03 |
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revolution 10 Feb 2009, 11:08
Tomasz Grysztar wrote: and coming 1.6
How do we type that in outside of the web browser?  |
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10 Feb 2009, 11:08 |
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Tomasz Grysztar 10 Feb 2009, 11:13
Hehe, right. Automatic emoticons are really annoying sometimes.
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10 Feb 2009, 11:13 |
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revolution 10 Feb 2009, 11:16
How do we say it to our friends? "I'm using version 1.6cool"
Of course as we all know programmers are far too nerdy to have friends so I guess it won't matter how we say it.  |
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10 Feb 2009, 11:16 |
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MazeGen 10 Feb 2009, 13:51
Tomasz Grysztar wrote:
Seems like something went wrong again, it says: Code: use64 PEXTRW RAX, MM0, 1 Quote: flat assembler version 1.67.30.2 (1248703 kilobytes memory) But this work well: Code: use64 PEXTRW RAX, XMM0, 1 |
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10 Feb 2009, 13:51 |
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Tomasz Grysztar 10 Feb 2009, 14:31
MazeGen wrote: But this work well: But this one is the new opcode (0F 3A 15), for which the reg64 is certainly allowed as target (but not MMX register as source), while I'm still not sure about the old opcode. Well, I may allow that for symmetry. In fact, if you put EAX as target, it still would zero-extend to RAX, thus this anyway will work correctly, won't it? |
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10 Feb 2009, 14:31 |
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MazeGen 10 Feb 2009, 14:45
Yes, you should consider if you either 1) deny 64-bit destination register if its high dword is zero-extended anyway when 32-bit one is used, 2) allow 64-bit register and issue unnecessary REX prefix, 3) allow 64-bit register, but strip REX in case it is not really needed.
I'm not sure which option is right. Second one is good if you want to get rid of reports like "I wanted RAX, but FASM gave me EAX", third one is good because it emits shorter code. BTW, you should use shorter encoding 66 0F C5 here instead of 66 0F 3A 15. (seems like someone forgot to allow memory operand along with 0FC5, hehe) EDIT: typo in 0F35 corrected to 0FC5 Last edited by MazeGen on 10 Feb 2009, 15:00; edited 3 times in total |
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10 Feb 2009, 14:45 |
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Tomasz Grysztar 10 Feb 2009, 14:50
MazeGen wrote: BTW, you should use shorter encoding 66 0F 35 here instead of 66 0F 3A 15. It used longer encoding here because I thought that 48 prefix is not allowed for the 0F 35. I bet the best would be to just test it on some real CPU. |
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10 Feb 2009, 14:50 |
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MazeGen 10 Feb 2009, 15:04
If I'm not wrong, we can't test it because REX prefix doesn't raise any exceptions when it doesn't take effect. Misplaced REX prefix (something like 48 66 0F C5 C0 01) doesn't raise any exceptions as well.
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10 Feb 2009, 15:04 |
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