if I do a fixed delivery mode IPI interrupt to all CPUs excluding self
on a 2 CPU system, (all excluding self, edge trigger mode, assert,
fixed delivery mode, physical destination mode, vector = 254)

that happens correctly,

but if I IMMEDIATELY do that again the second IPI is ignored,
if I wait long enough then a second IPI happens,

now I tried instead waiting till the delivery status was idle
before immediately sending another but that also was ignored.

does anyone know why this is?

shouldnt the other APIC just hold off and delay the int?


maybe I could make the other cpus set some bits at the
end of their handlers but in general that is very complicated
as there can be up to 256 cpus and up to 256 IPI vectors
(I avoid the early IPI vectors eg <= 32 I dont use)

I tried another experiment where I put both the BSP and
AP into infinite loops doing such IPIs,

both happen at the same int handler at vector 254 which
echos some text and the CPU number (0 or 1 here),

when I run this the text is being echoed ultra fast forever,

so SOME IPIs get through, it would appear as soon as enough
time has elapsed an IPI will get through. But it is very annoying
that there is no guarantee, that will cause a lot of problems
for coding