I'm trying to write some CPU tests and fasm keeps optimizing my LDMs and STMs to LDRs and STRs. I can sort of work around it by hand assembling the instructions and writing out the opcode with an inline dw, but it's very slow, hard to modify, and hard to read. Is there any way to disable optimizations entirely?

I'll assume you are asking about fasmarm.

You can disable the availability of encodings using the processor and coprocessor directives. This will prevent fasmarm from finding some alternative instructions if they are not made available to it.

These are instructions that are available in all versions of the ARM architecture.

All instructions have a processor or a coprocessor switch to enable/disable them.

Please give an example of what you are trying to achieve.

In this case where I'm trying to test STM with r15 as the base register and various register list combinations

gets turned into


The instruction does the same thing. It's just not what I'm trying to test.

That is because r15 is not valid as a source register for LDM, so fasmarm will select something else that is valid as a replacement.

Both of those instructions are V1 so you are correct that deselecting a processor bit won't be able to prevent the substitution without modifying the source code.