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Index > Macroinstructions > [fasmg] x86 instruction support

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bitRAKE



Joined: 21 Jul 2003
Posts: 3282
Location: vpcmipstrm
bitRAKE
I've wrote up a little overview of the extensions available for x86:
https://github.com/bitRAKE/fasmg_playground/wiki/x86-Instruction-Support

There are probably errors / misunderstandings. The goal is just to accelerate understanding and use of the extensions.
Code:
calminstruction clzero? dest*
        asmcmd  =x86.=parse_operand =@dest,dest
        check   @dest.type = 'reg' & @dest.rm = 0 & @dest.size <> 1
        jyes    _prefix
        asmcmd  =err 'operand must be rAX'
        exit
_prefix:
        asmcmd  =x86.=store_operand_prefix =@dest.=size
        asmcmd  =db 0Fh,1,0FCh
end calminstruction

macro mwaitx?
        db 0Fh,01h,0FBh
end macro

macro monitorx?
        db 0Fh,01h,0FAh
end macro

clzero rax
clzero eax
clzero ax    
...and tried my hand at simpler instruction addition.

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Post 19 Mar 2021, 04:24
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bitRAKE



Joined: 21 Jul 2003
Posts: 3282
Location: vpcmipstrm
bitRAKE
Code:
; SSE4a

macro extrq? dest*,src*,sel
        SSE.parse_operand @dest,dest
        if @dest.type = 'mmreg' & @dest.size = 16
                match ,sel ; 66 0F 79 /r
                        SSE.parse_operand @src,src
                        if @src.type = 'mmreg' & @src.size = 16
                                @src.opcode_prefix = 66h
                                x86.store_instruction <0Fh,79h>,@src,@dest.rm
                        else
                                err 'invalid combination of operands'
                        end if
                else ; xmm,ib,ib ; 66 0F 78 /0 ib ib
                        x86.parse_operand @aux1,src
                        x86.parse_operand @aux2,sel
                        if @aux1.type <> 'imm' | @aux1.size and not 1 \
                        | @aux2.type <> 'imm' | @aux2.size and not 1
                                err 'invalid combination of operands'
                        else
                                @dest.opcode_prefix = 66h
                                x86.store_instruction <0Fh,78h>,@dest,0,2,(@aux2.imm shl 8) or @aux1.imm
                        end if
                end match
        else
                err 'invalid combination of operands'
        end if
end macro

macro insertq? dest*,src*,sel1,sel2
        SSE.parse_operand @dest,dest
        SSE.parse_operand @src,src
        if @dest.type = 'mmreg' & @src.type = 'mmreg'
                if (@dest.size or @src.size) <> 16
                        err 'invalid operand size'
                end if
                match ,sel1 sel2
                        @src.opcode_prefix = 0F2h
                        x86.store_instruction <0Fh,79h>,@src,@dest.rm
                else
                        x86.parse_operand @aux1,sel1
                        x86.parse_operand @aux2,sel2
                        if @aux1.type <> 'imm' | @aux1.size and not 1 \
                        | @aux2.type <> 'imm' | @aux2.size and not 1
                                err 'invalid combination of operands'
                        else
                                @src.opcode_prefix = 0F2h
                                x86.store_instruction <0Fh,78h>,@src,@dest.rm,2,(@aux2.imm shl 8) or @aux1.imm
                        end if
                end match
        else
                err 'invalid combination of operands'
        end if
end macro

iterate instr, movntss,movntsd
        macro instr? dest*,src*
                SSE.parse_operand @dest,dest
                SSE.parse_operand @src,src
                if @dest.type = 'mem' & @dest.size = 4*% \
                & @src.type = 'mmreg' & @src.size = 16
                        @dest.opcode_prefix = 0F4h - %
                        x86.store_instruction <0Fh,2Bh>,@dest,@src.rm
                else
                        err 'invalid combination of operands'
                end if
        end macro
end iterate    
This is really close to being correct (*I think*).

Problem is this line (in extrq?):
Code:
x86.store_instruction <0Fh,78h>,@dest,@dest.rm,2,(@aux2.imm shl 8) or @aux1.imm    
The @dest part is updating register field in the wrong place (i.e. @dest,0 doesn't work), but I don't know what to put there. @dest.rm seem the correct register field. Having lots of examples made the rest easy - almost cut-n-paste. I don't claim to understand it all though.

Edit: Actually found an error in disassembler. Above code is correct.
https://github.com/x64dbg/x64dbg/issues/2615

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Post 19 Mar 2021, 15:21
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bitRAKE



Joined: 21 Jul 2003
Posts: 3282
Location: vpcmipstrm
bitRAKE
Venn-diagram of AVX512 support.
How crazy is that?

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Post 24 Apr 2021, 14:59
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