Admittedly, it has nothing to do with the thread about PSR Invaders, but I've recently found a pretty well commented IDA disassembly of this compiler (I still have a few way out-of-date legal copies of IDA), and as I'm currently working with TP3 sources, I thought it might be interesting to see if this compiler can be optimised a bit.

It might no longer run on an 8086, and it might not even run under DOSemu or VDosPlus, but it would definitely run under DOS in a VM, or XP in the same.

There are obviously plenty of simple optimisations to be made, like replacing

by

but what about merging Norbert Juffa's improved "6-byte real" arithmetic from TPL60N19 or BPL70N16 into TP3, and the like?

If anyone is interested, feel free to reply here, or drop me a line, and I can forward the assembler listing produced by IDA, cannot attach a zipped copy right now, as the Freeware IDA 7.0 on my laptop doesn't want to know about IDA 4.x .IDB files.

What are you optimising for? Speed? Size? Other?

Given that the average CPU nowadays runs at GHz speeds, and Turbo was already, relatively speaking, insanely fast on a 4.77MHz PC, speed isn't really too much of a problem, although fewer instructions emulated helps a (very tiny) bit.

Size seems to be the main thing, there is plenty of code where "6 pushes, a call, 6 pops" could be replaced by a single, albeit probably somewhat slower, "PUSHA/POPA", but the other area, retrofitting (Norbert Juffa's) TP6/BP7 code would be far more interesting, as that would make the 6-byte real code IEEE-754 compliant (well, as far as the format allows), and it should allow comparing output of this compiler with that of Virtual Pascal or FreePascal.