flat assembler
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Tomasz Grysztar 30 Apr 2020, 17:52
Thank you! It's fixed now.
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tthsqe 30 Apr 2020, 21:20
What about
vpsrlq reg, mem, imm assembling just fine when the processor says #UD on what FASM generates. |
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Tomasz Grysztar 30 Apr 2020, 21:43
You got me a bit confused, as this seems to be completely unrelated to this thread.
Anyway: VPSRLQ reg,mem,imm is a variant only present in AVX-512. You can test this with fasmg, where the instruction does not assemble with AVX2.INC, but assembles with AVX512.INC. |
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tthsqe 30 Apr 2020, 22:17
Sorry, you are right - 256 bit shift from memory only in avx 512
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