Intel released new instruction set called AVX512.
http://download-software.intel.com/sites/default/files/319433-015.pdf

Moved to Main

А зачем было создано обновление 1.71.13? Жду ответа.

You're panicking too soon. According to this:

http://www.extremetech.com/computing/162152-intel-supercharges-avx-to-512-bits-will-likely-come-to-mainstream-cpus-in-2015

...The first product to support AVX 512 will be a Xeon Phi that will be released during 2015. If Skylake is the first consumer Processor that will support it, then we're also talking about somewhere during 2015 at the very least. That is at least one year and half from now.

Are you kidding? Of course they will.

BTW: Did you miss the announcement a few months back that all new chips will be soldered in to the mobos? The days of swapping CPUs in a socket are numbered. Stock up on them now while you still can.

if they change the standard size and contained motherboard & processor into iphone size, maybe that is great news still, market seems to accept mobile phone & laptop cannot swap processor already, maybe it would works on pc market.

А когда выйдет фасм с AVX 512?

Ауу

Try to ask in English

Fasm with AVX 512 where?

After tthsqe brought my attention to AVX-512 in August, I did some preliminary research and my conclusion was that it should not be hard to implement this extension into fasm. I already had the possibility of such extension in mind when I designed AVX.INC.

What is really new, though, is the new brace-enclosed syntax for some additional settings of instruction's operation. It is an interesting coincidence that this is very similar to the syntax I envisioned for instruction encoder annotations in fasm 2.0. After I saw this, my initial thought was that maybe I could go on with it and integrate these two syntaxes into one, since they play a bit similar role. But then I realized this was a bad idea. Not only because it could lead to potential conflict with future Intel's extension, but also because the similarity of their purposes is only cursory. The ones used in AVX-512 specify additional settings for the operation that is performed by instruction, while the annotations I planned for fasm 2.0 would specify additional settings for the encoding of instruction (as I want to finally completely separate the syntax of what the instruction does from any additional syntax quirks that would allow to enforce some specific encoding, should anyone need it). So this means that I will have to invent some other syntax for fasm 2.0 annotations, and leave the braces for the Intel extensions.

Anyway, the only real difficulty I predict is that I need to find at least a few days that I can dedicate solely to this task. A few days in winter, I think.

Has this been advanced in any way? Fasm can't seem to compile instructions like this:

which is given as an example in Intel's manual. And FASM manual doesn't mention AVX-512.

Unfortunately it still has not been added to fasm 1 core. As I mentioned in the thread discussing fasm g it was because of that project that I postponed the AVX-512 implementation. It may have been the wrong choice from the point of view of anyone that still wants to use fasm 1 with the latest instructions sets and does not care about fasm g - on the other hand I am glad that I chose to create fasm g, since it gives me a better foundation for my possible future projects. And AVX-512 implementation is a simpler thing that I may still be able to accomplish his year anyway.