Using the notation from the manual with a slight modification:

Code:

READ A.1.1
READ A.1.0
        READ B.1.0
        READ C.1.0
        WRITE B.1.0
        WRITE C.1.0
        READ A.1.0
        WRITE A.1.0

READ A.2.0
READ A.2.1
        READ B.2.1
        READ C.2.1
        WRITE B.2.1
        WRITE C.2.1
        READ A.2.1
        WRITE A.2.1    

...where READ.A.2.1 means a read operation at location A, processor 2, and lock bit is 1. As long as processor ordering is preserved, what is the ordering (shuffling) which produces an error?

It does work generally.

1) threads only signal one other thread
2) last write is signal update

This insures the sequential operation. Although the write order between processors is not guaranteed, the write order of a single processor is ordered. (Speaking about the main memory bus - multi-chip/core.) So, this describes a sequential fragmented stream of instructions - not a parallel process. It is a lock in that sense, but not a typical lock. It would be advantageous to have several such sequential streams running in parallel.

Not sending the bus lock is important.

;...
TEST_COUNT1 = 1000
TEST_COUNT2 = 9000
;...
          invoke  CreateThread,NULL,0,[address#i],TEST_COUNT#i,NULL,thread#i
;...    

revolution
Counter:5254850 Time:203
Counter:8360000000000000 Time:4243

lock on both 32 addresses without JNC
Counter:3710357 Time:249
Counter:8360000000000000 Time:1732

lock on both 32 addresses using JNC
Counter:3816022 Time:187
Counter:8360000000000000 Time:1092

;--- DATA 
NUMT equ 8
 rept NUMT i {
   thread#i dd ?
  }
  sig_start dd 0
  ;--- CODE 

  rept NUMT i {
   invoke  CreateThread,NULL,0,[address],TEST_COUNT+i*10000,NULL,thread#i
   mov  [thread#i],eax
 }
  mov  [sig_start],1
  invoke  WaitForMultipleObjects,NUMT,thread1,TRUE,-1
    

proc safe_thread count
.start:
 lock and [sig_start],1         ;--- avoid ResumeThread overhead
 jz .start
 mov esi,1000000000   ;--- possible adder value
.loop:
 lock add dword[counter+0],esi
 jnc    @f
 lock adc dword[counter+4],0  ;--- lock this only when needed
 ;--- @add64 [counter] ;--- revolution renamed macro
@@:
 dec  [count]
 jnz  .loop
 ret
endp
    

TEST_COUNT      = 10000000
ADDER_VALUE     = 10000000000
THREAD_COUNT    = 2

include 'win32ax.inc'

macro old_atomic_64_bit_read address {
        ;thread safe read 64-bit memory location. read edx:eax from memory
        ;ebx and ecx are corrupted
        mov     ebx,eax         ;in case of match place back the same value (non-destructive read)
        mov     ecx,edx         ;in case of match place back the same value (non-destructive read)
        lock cmpxchg8b [address]        ;value is returned in edx:eax (edx is high order 32 bits, eax is low order 32 bits)
}

macro old_atomic_64_bit_write address {
        ;thread safe write 64-bit memory location. write ecx:ebx to memory (ecx is high order 32 bits, ebx is low order 32 bits)
        ;edx and eax are corrupted
        local   .retry
    .retry:
        lock cmpxchg8b [address]        ;write ecx:ebx to memory if edx:eax matches current value
        jnz     .retry          ;if no match then try again with new value in edx:eax
}

macro old_atomic_64_bit_op address,op1,op2 {
        ;thread safe operation of edi:esi with the 64-bit memory location (edi is high order 32 bits, esi is low order 32 bits)
        ;eax, ebx, ecx and edx are corrupted
        ;firstly read the value in the memory location
        local   .retry
        old_atomic_64_bit_read address
    .retry:
        ;transfer to working registers ecx:ebx
        mov     ebx,eax
        mov     ecx,edx
        ;do the requested operation
        op1     ebx,esi
        op2     ecx,edi
        ;try to write it back
        lock cmpxchg8b [address]        ;write ecx:ebx to memory only if edx:eax matches current value (i.e. no one else has changed the value)
        jnz     .retry          ;if the memory value has changed then try again with new value in edx:eax
}

macro old_atomic_64_bit_add address { old_atomic_64_bit_op address,add,adc }
macro old_atomic_64_bit_sub address { old_atomic_64_bit_op address,sub,sbb }
macro old_atomic_64_bit_xor address { old_atomic_64_bit_op address,xor,xor }
macro old_atomic_64_bit_or  address { old_atomic_64_bit_op address, or, or }
macro old_atomic_64_bit_and address { old_atomic_64_bit_op address,and,and }
macro old_atomic_64_bit_inc address {
        xor     edi,edi
        mov     esi,1
        old_atomic_64_bit_add address
}
macro old_atomic_64_bit_not address {
        or      edi,-1
        or      esi,-1
        old_atomic_64_bit_xor address
}

;newer macros below

macro atomic_64_bit_read address {
        ;thread safe read 64-bit memory location. read edx:eax from memory
        ;ecx is corrupted
        local   .again
    .again:
        mov     ecx,dword[address+0]
        mov     edx,dword[address+4]
        mov     eax,dword[address+0]
        cmp     ecx,eax
        jnz     .again
}

macro atomic_64_bit_write address {
        ;thread safe write 64-bit memory location. write ecx:ebx to memory (ecx is high order 32 bits, ebx is low order 32 bits)
        ;edx and eax are corrupted
        local   .retry
    .retry:
        lock cmpxchg8b [address]        ;write ecx:ebx to memory if edx:eax matches current value
        jnz     .retry          ;if no match then try again with new value in edx:eax
}

macro atomic_64_bit_op address,op1,op2 {
        ;thread safe operation of edi:esi with the 64-bit memory location (edi is high order 32 bits, esi is low order 32 bits)
        ;eax, ebx, ecx and edx are corrupted
        ;firstly read the value in the memory location
        local   .retry
        atomic_64_bit_read address
    .retry:
        ;transfer to working registers ecx:ebx
        mov     ebx,eax
        mov     ecx,edx
        ;do the requested operation
        op1     ebx,esi
        op2     ecx,edi
        ;try to write it back
        lock cmpxchg8b [address]        ;write ecx:ebx to memory only if edx:eax matches current value (i.e. no one else has changed the value)
        jnz     .retry                  ;if the memory value has changed then try again with new value in edx:eax
}

macro atomic_64_bit_add address { atomic_64_bit_op address,add,adc }
macro atomic_64_bit_sub address { atomic_64_bit_op address,sub,sbb }
macro atomic_64_bit_xor address { atomic_64_bit_op address,xor,xor }
macro atomic_64_bit_or  address { atomic_64_bit_op address, or, or }
macro atomic_64_bit_and address { atomic_64_bit_op address,and,and }
macro atomic_64_bit_inc address {
        xor     edi,edi
        mov     esi,1
        atomic_64_bit_add address
}
macro atomic_64_bit_not address {
        or      edi,-1
        or      esi,-1
        atomic_64_bit_xor address
}

.data

        counter dq ?
        threads rd THREAD_COUNT
        message rb 1 shl 12

.code

start:
        stdcall run_test,unsafe_thread,'unsafe'
        stdcall run_test,unsafe_thread_2,'unsafe2'
        stdcall run_test,old_safe_thread,'old safe'
        stdcall run_test,safe_thread,'safe'
        invoke  MessageBox,0,message,'Safe or not?',0
        invoke  ExitProcess,0

proc run_test uses esi edi ebx,address,name
        xor     ecx,ecx
        xor     ebx,ebx
        atomic_64_bit_write counter
        invoke  GetTickCount
        mov     edi,eax
        mov     esi,threads
    .thread_loop:
        invoke  CreateThread,NULL,0,[address],TEST_COUNT,NULL,esi
        mov     [esi],eax
        add     esi,4
        cmp     esi,threads+THREAD_COUNT*4
        jnz     .thread_loop
        invoke  WaitForMultipleObjects,THREAD_COUNT,threads,TRUE,-1
        invoke  GetTickCount
        sub     edi,eax
        neg     edi
        invoke  lstrlen,message
        invoke  wsprintf,addr message+eax,<'%s',9,'Count:%I64u Time:%u',13,10>,[name],double [counter],edi
        ret
endp

proc unsafe_thread count
        mov     esi,ADDER_VALUE and 0xffffffff
        mov     edi,ADDER_VALUE shr 32
    .loop:
        mov     eax,dword[counter+0]
        mov     edx,dword[counter+4]
        add     eax,esi
        adc     edx,edi
        mov     dword[counter+0],eax
        mov     dword[counter+4],edx
        dec     [count]
        jnz     .loop
        ret
endp

proc unsafe_thread_2 count
        mov     esi,ADDER_VALUE and 0xffffffff
        mov     edi,ADDER_VALUE shr 32
    .loop:
        lock
        add     dword[counter+0],esi
        lock
        adc     dword[counter+4],edi
        dec     [count]
        jnz     .loop
        ret
endp

proc old_safe_thread count
        mov     esi,ADDER_VALUE and 0xffffffff
        mov     edi,ADDER_VALUE shr 32
    .loop:
        old_atomic_64_bit_add counter
        dec     [count]
        jnz     .loop
        ret
endp

proc safe_thread count
        mov     esi,ADDER_VALUE and 0xffffffff
        mov     edi,ADDER_VALUE shr 32
    .loop:
        atomic_64_bit_add counter
        dec     [count]
        jnz     .loop
        ret
endp

.end start    

unsafe  Count:132691383273074688 Time:374
unsafe2 Count:200000000000000000 Time:811
oldsafe Count:200000000000000000 Time:1857
safe    Count:200000000000000000 Time:1606    

    .again:
        mov     ecx,dword[address+0]
        mov     edx,dword[address+4]
        mov     eax,dword[address+0]
        cmp     ecx,eax
        jnz     .again
    

Code:

    .again:
        mov     ecx,dword[address+0]
        mov     edx,dword[address+4]
        mov     eax,dword[address+0]
        cmp     ecx,eax
        jnz     .again
    

this may have flaws too, for the same reason i agreed with you above about carry propagation on hi address. and you have here
the latency of 2 more not-locking-MOV (danger!! ) and a JNZ.
the method using 2-LOCK and JNC has the disadvantage to assume the hi register is correct. this has lead me to think that we are only trying
good programming design, on the other side neglecting preventing an eventual bad modification/access to a resource (the 64bit counter ).
the advantages are but worth to be considered.

unsafe Count:146134917961604096 Time:109
unsafe2 Count:200000000000000000 Time:1092
oldsafe Count:200000000000000000 Time:1935
safe Count:200000000000000000 Time:1529