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flat assembler > Compiler Internals > incorrect "optimization"

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Japheth



Joined: 26 Oct 2004
Posts: 151
There was a brief "discussion" in masm32 forum about a probably incorrect optimization in fasm. The testcase is:

Code:
format mz entry _text:start stack 400h segment _text start: mov ax,_data mov ds,ax mov ebp,1 mov dx,[table+ebp*2] mov ah,9 int 21h mov ah,4ch int 21h segment _data string0 db "string0",13,10,'$' string1 db "string1",13,10,'$' string2 db "string2",13,10,'$' table dw string0, string1, string2


expected result is "string1" to be displayed, but this isn't the case with recent fasm.
Post 18 Oct 2012, 04:59
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JohnFound



Joined: 16 Jun 2003
Posts: 3475
Location: Bulgaria
ebp works by default on ss, not on ds. This is not because of FASM optimizations.
Post 18 Oct 2012, 05:53
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 15871
Location: 162173 Ryugu
fasm does not track the contents of the segment registers. fasm does not know that the SS register is not initialised to point to the data segment. Use this:
Code:
mov dx,[ds:table+ebp*2]
Post 18 Oct 2012, 07:00
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sinsi



Joined: 10 Aug 2007
Posts: 683
Location: Adelaide
The original "problem" was that FASM will take LEA EAX,[6+EBX*2] and change it to the shorter version of LEA EAX,[6+EBX+EBX].
Fine by me, since it works out the same. Then there was a gotcha about using EBP.

MASM will encode LEA EAX,[6+EBP+EBP] with a DS override, FASM doesn't.
I've looked briefly through the intel docs but can't find anything. Anyone?
Post 18 Oct 2012, 07:43
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 15871
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sinsi wrote:
The original "problem" was that FASM will take LEA EAX,[6+EBX*2] and change it to the shorter version of LEA EAX,[6+EBX+EBX].
Fine by me, since it works out the same. Then there was a gotcha about using EBP.

MASM will encode LEA EAX,[6+EBP+EBP] with a DS override, FASM doesn't.
I've looked briefly through the intel docs but can't find anything. Anyone?
LEA does not use any segment register, it doesn't access memory at all.
Post 18 Oct 2012, 07:55
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JohnFound



Joined: 16 Jun 2003
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AFAIK, EBP based addressing always works on SS by default. That is because EBP is designed to be used for stack access.

So, [2*ebp+6] or [ebp+ebp+6], both should work on SS.

P.S. I mean in memory accessing instructions. LEA of course will not use any segments at all.
Post 18 Oct 2012, 08:00
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Japheth



Joined: 26 Oct 2004
Posts: 151
I quite intentionally didn't provide a link to the masm32 forum thread because it's mainly about LEA and LEA is ABSOLUTELY irrelevant for this issue.

Masm and assumed behavior of Masm is also irrelevant. This problem is not because Fasm doesn't ASSUME segment register contents.

I agree that adding a DS segment prefix makes the test case "work" - but this is not the point. The point is that the test case is to work WITHOUT any segment prefix.
Post 18 Oct 2012, 08:12
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JohnFound



Joined: 16 Jun 2003
Posts: 3475
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Japheth wrote:
The point is that the test case is to work WITHOUT any segment prefix.


Explain this more detailed. Why it should work? IMHO, in both cases [ebp+ebp+const] or [ebp*2+const] the CPU will try to access SS.

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Post 18 Oct 2012, 08:21
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sinsi



Joined: 10 Aug 2007
Posts: 683
Location: Adelaide
>MASM will encode LEA EAX,[6+EBP+EBP] with a DS override, FASM doesn't.
That should be MOV, not LEA. Sorry.

>Masm and assumed behavior of Masm is also irrelevant.
Relevant, because FASM does differently.

Japheth, do you know if it says anything in the intel docs?
Also, what does jwasm do?
Post 18 Oct 2012, 08:24
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Japheth



Joined: 26 Oct 2004
Posts: 151
JohnFound wrote:
IMHO, in both cases [ebp+ebp+const] or [ebp*2+const] the CPU will try to access SS.

That's the point. SS is only the default segment register if the base register is EBP (or ESP or BP). The index register doesn't matter.
Post 18 Oct 2012, 08:33
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JohnFound



Joined: 16 Jun 2003
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Ah, I got it now, after some tests ( Smile )
It is a bug and has to be fixed. Tomasz probably already thinks about it.
Post 18 Oct 2012, 08:49
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 6873
Location: Kraków, Poland
No, it is not a bug. It was already discussed on this board, see my stance here: http://board.flatassembler.net/topic.php?p=116138#116138 (starting with "As for the EBP*2 problem" words).
In short: by default fasm optimizes as for flat mode, where segments do not matter (and so addresses containing EBP can be most agressively optimized).
When working in segmented environment and unsure about the base segment that will get used, just use segment prefix in the address expression and fasm will happily optimize instruction that does exactly what it is told to.

You can also find some related release notes about rare optimization cases here: http://board.flatassembler.net/topic.php?p=118691#118691
Post 18 Oct 2012, 09:20
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JohnFound



Joined: 16 Jun 2003
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I missed this discussion. Embarassed But your arguments looks reasonable.
Post 18 Oct 2012, 09:31
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Japheth



Joined: 26 Oct 2004
Posts: 151
JohnFound wrote:
I missed this discussion. Embarassed But your arguments looks reasonable.


I also missed this. Personally, I find the argumentation a bit "borderline" ( somewhat similiar to the SSSO "arguments" ), but never mind!
Post 18 Oct 2012, 12:52
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shutdownall



Joined: 02 Apr 2010
Posts: 518
Location: Munich
Tomasz Grysztar wrote:
When working in segmented environment and unsure about the base segment that will get used, just use segment prefix in the address expression and fasm will happily optimize instruction that does exactly what it is told to.


Or simply use EDI instead of EBP because EDI has DS as default segment.
Post 18 Oct 2012, 19:46
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