Branch Trace Store and Debug Store feature

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ouadji

Joined: 24 Dec 2008
Posts: 1081
Location: Belgium

ouadji 29 May 2011, 07:09

INTEL 3A/16.4.9 + Figure 16-5

BTS and DS save area.
(Branch Trace Store and Debug Store feature)

Is it necessary (essential ?) to have a different DS_Save_Area for each processor ?
I think so because I get my best results with 4 DS_Area (4 µPs).
That said, i don't understand why it doesn't work properly with a single shared area.
Has someone ever used this feature successfully on a multi-processors system ?

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29 May 2011, 07:09

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