Here and there i keep finding this term and i have no clue what it means.
Maybe its something really simple, but i cant imagine idea behind it.



Question 2, how do i implement signed multiplication/division? My current way is to NEG negative operands, do normal multiplication/division and then xor original signs. If xor is 1 neg result, if xor is 0, leave result. In case division also do it to reminder.

1:

I don't really understand it the way they explain it. I see it as the negative is denoted by extending 1s instead of the implied 0s. Like, 2=00000010 (notice the 6 implied 0s), 8bit -2 = 11111110 (notice that those 0s were replaced with 1s.

2: imul and idiv?

One's compliment: not eax
Two's compliment: neg eax

1. so this compliment is way of representing negative and positive data or what.

neg eax is transformation like -6 <=> 6, not eax is -6 <=> 5. and what has to do with compliment, whats compliment, i dont understand that word maybe in that context. There is instruction btc, wich flips a bit and set cf to old value. Is that it? compliment = flip all bits, and in ones compliment you get negative value, while in twos you get negative - 1?


2. And what of data that doesnt fit into register? IMHO x86 ALU sucks, because it should support arithmetics on non-fixed length data. It should implement hardware operations as it do now, but simply over not fixed ammount of bytes. For example, it should take pointer to memory wich would contain pointer to data and their length. And even it could allow for more complex operations than basic 2. Whatever, why not additional chip designed just to do math, and not implement anything arithmetic on x86. We could go 1 step ahead, and strip x86 from logical functions as well. 1 chip pure io, 1 logic, 1 arithmetic.

Just another way of saying opposite. You want to go backwards? We had that with 8087s and the like. Going off chip is slow, better to have everything integrated as much as possible.

1 Yes, positive and negative. Positive in twos complement is just like non-twos-compliment, just you can't use the most significant bit.

2. That's too complex for circuitry. Just do it in software. I realize it's a pain to try to code such things in asm, so use an HLL.

neg = not +1

a CPU is a Central Processing Unit, and is designed to compute things.
then, X86, as a CPU family, is able to compute things, in one single chip. non need to separate chips to do what can do a single 20mm² chip.

1. thank you now i finally get it. Initialy i though it have something to do with ammount of states 1 bit can have.

2. No its not that hard if i use straightforward method, but why not make cpu do that for me? It would be however impossible in HLL, carry/borrow in C? Good joke. Signed division? Good luck with that.

Use an FPGA.

Actually, 64 bit integers make it pretty easy to carry. Not so efficient, but I don't care. If you want efficiency, use GMP. They have custom asm routines for pretty much everything.

Now try 4096 bit mod 512 bit.

The concept scales. I'm not going to waste my time proving what has already been proven. I only do that in math. Yet again, I'm going to defer to GMP. The have done it, so any statement saying it can't be done is false by default.

Ok maybe a little correction from me: When i ment 'impossible' i ment 'a huge waste of time, memory, and health'.

sign ADD sign does near same:
01 + 01 = 10 = '+'
01 + 00 = 01 = '-'

[quote=]...division...[/quote]
remember decimal div:
10 / 1, we have 10 subtract cycles max when dividend's and divisor's places differ by 1
100 / 1, 3 places versus 1 give 100 subtract cycles max
100 / 10, 3 places versus 2, give 10 max

for binary division difference in 1 place gives 2 sub cycles/iteration max:
10b / 01b
1010b / 111b

2^places