Can anyone tell me what exactly goes on when I do:

mov [eax + 4], dword -1

I don't quite understand why FASM allows you to do eax+4, is this code expanded to something else? To elaborate, I am asking at what stage the +4 is applied, because I don't understand how it would do it during assembly-time.

bot,

When in doubt, RTFM.
Intel SDM clearly states that [eax]+disp8 is valid memory reference in 32-bit addressing mode (which in 16-bit code segment requires 0x67 address-size prefix).

Said in another way: The processor execution stage.
The processor loads the value of eax and adds 4 to this, which becomes the address to store the value (-1).