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Index > Compiler Internals > [bug] Address overrides and wide variant with FXSAVE/FXRSTOR

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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 16901
Location: In your JS exploiting you and your system
revolution
I am having trouble with FXSAVE/FXRSTOR.

Problem 1) I am unable to force a byte offset:
Code:
use32
fxsave [byte eax+10h] ;error: invalid size of address value.
use64
fxsave [byte eax+10h] ;error: invalid size of address value.
fxsave [byte rax+10h] ;error: invalid size of address value.
    

Problem 2) I CAN use a qword override:
Code:
use32
fxsave [qword eax+10h] ;assembler says okay but this is wrong
use64
fxsave [qword eax+10h] ;assembler says okay but this is wrong
fxsave [qword rax+10h] ;assembler says okay but this is wrong
    

Problem 3) I need 'DB 48h' to get the "wide" version:
Code:
use64
fxsave [rax+10h] ;32bit operand version
db 48h ;REX.W=1
fxsave [rax+10h] ;64bit operand version
    
Post 10 Sep 2006, 01:55
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 7494
Location: Kraków, Poland
Tomasz Grysztar
1) The size operator inside square brackets applies to the effective address size, not only the size of displacement. Thus "byte" is not allowed, as there is no 8-bit addressing. The size operator in such context can be used just to force using the "full size" of displacement for the given address size (or to specify the address size when there is no register in addressing).

2) This one seems to be a bug.

3) According to this thread, we perhaps should introduce FXSAVEQ mnemonic?
Post 10 Sep 2006, 09:15
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 16901
Location: In your JS exploiting you and your system
revolution
Tomasz Grysztar wrote:
The size operator inside square brackets applies to the effective address size
Oops, okay, my blunder there. But is there a way to assemble 'op reg,[reg+0]' and have a byte offset of zero? It would appear one has to use a non-zero value and then use 'store 0 at $-1' to get the desired effect.

Tomasz Grysztar wrote:
FXSAVEQ mnemonic?
Hmm, Intel/AMD need a kick up the bum here, they forgot about that. The Q variant would seem to fit the bill well. FXRSTORQ also.
Post 10 Sep 2006, 12:09
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 16901
Location: In your JS exploiting you and your system
revolution
Also of note is this:
Code:
use32
mov eax,[qword ebx+1] ;Assembler says okay!    
Post 15 Sep 2006, 02:28
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 7494
Location: Kraków, Poland
Tomasz Grysztar
Fixed in 1.67.8.
Post 16 Sep 2006, 22:16
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