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Index > Projects and Ideas > Procbench - Multiplatform CPU benchmark in FASM

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kuscsikp



Joined: 07 May 2006
Posts: 19
kuscsikp
Procbench is a CPU benchmark that tests math capabilities of your processor Ii will measure the performance of your CPU, FPU and the Cache/Memory subsystem. It is multiplatform (Windows, Linux, Bootable, DOS...)

Located on this site:
http://developer.berlios.de/projects/procbench/
U can download it under the files...

Let me know if anyone's is interested in cooperating in such project, or has some interesting ideas. Or u have some interesting results (output of this
program) PLEASE SEND ME!
Post 07 May 2006, 11:27
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Tommy



Joined: 17 Jun 2003
Posts: 492
Location: Norway
Tommy
My results


Description:
Download
Filename: result.txt
Filesize: 1.18 KB
Downloaded: 429 Time(s)

Post 07 May 2006, 11:34
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viki



Joined: 03 Jan 2006
Posts: 40
Location: Czestochowa, Poland
viki
Basic CPUID info:
~~~~~~~~~~~~~~~~~
Vendor : AuthenticAMD
Family : 6
Model : 8
Revision : 1
Name : AMD Duron(tm) p
Features : fpu vme de pse tsc msr pae mce cxchg8 apic sep mtrr pge mca cmov pat pse36 mmx fxsr sse


Data TLB (2 MB and 4 MB pages):4-way set associative, 8 entries
Instruction TLB (2 MB and 4 MB pages): Fully associative, 8 entries
Data TLB (4 KB pages): Fully associative, 32 entries
Instruction TLB (4 KB pages): Fully associative, 16 entries
1st-level instr cache: 64 KBytes, 2-way set associative, 64 byte line size
1st-level data cache: 64 KBytes, 2-way set associative, 64 byte line size
2nd-level cache: 64 KBytes, 8-way set associative, 64 byte line size

Please wait!!!

Frequency [MHz]: 1597
16 bit addition [million/sec] : 1601
32 bit addition [million/sec] : 1601
16 bit multiply [million/sec] : 531
32 bit multiply [million/sec] : 400
RAM read test [mill DW/sec] : 3129
RAM write test [mill DW/sec] : 1581
Stack [mill of push&pop/sec] : 795
FPU Additions [100 000/sec] : 3289
FPU Multiply [100 000/sec] : 2980
FPU Square root [10 000/sec] : 1707
FPU Sinus [10 000/sec] : 1731
Post 07 May 2006, 20:38
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LocoDelAssembly
Your code has a bug


Joined: 06 May 2005
Posts: 4633
Location: Argentina
LocoDelAssembly
ProcBench CPU analyzer 0.30 wrote:
Basic CPUID info:
~~~~~~~~~~~~~~~~~
Vendor : AuthenticAMD
Family : 15
Model : 15
Revision : 0
Name : AMD Athlon(tm) 64 Processor 3200+
Features : fpu vme de pse tsc msr pae mce cxchg8 apic sep mtrr pge mca cmov pat pse36 clfl mmx fxsr sse sse2 sse3


Data TLB (2 MB and 4 MB pages): Fully associative, 8 entries
Instruction TLB (2 MB and 4 MB pages): Fully associative, 8 entries
Data TLB (4 KB pages): Fully associative, 32 entries
Instruction TLB (4 KB pages): Fully associative, 32 entries
1st-level instr cache: 64 KBytes, 2-way set associative, 64 byte line size
1st-level data cache: 64 KBytes, 2-way set associative, 64 byte line size
2nd-level cache: 512 KBytes, 8-way set associative, 64 byte line size

Please wait!!!

Frequency [MHz]: 2009
16 bit addition [million/sec] : 2002
32 bit addition [million/sec] : 2002
16 bit multiply [million/sec] : 663
32 bit multiply [million/sec] : 663
RAM read test [mill DW/sec] : 3766
RAM write test [mill DW/sec] : 2002
Stack [mill of push&pop/sec] : 993
FPU Additions [100 000/sec] : 4008
FPU Multiply [100 000/sec] : 3773
FPU Square root [10 000/sec] : 2032
FPU Sinus [10 000/sec] : 2034
Post 07 May 2006, 21:16
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kuscsikp



Joined: 07 May 2006
Posts: 19
kuscsikp
Thanks! This is my computer:


Description:
Download
Filename: out.txt
Filesize: 1.14 KB
Downloaded: 387 Time(s)

Post 08 May 2006, 06:37
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vid
Verbosity in development


Joined: 05 Sep 2003
Posts: 7106
Location: Slovakia
vid
great work
Quote:
Basic CPUID info:
~~~~~~~~~~~~~~~~~
Vendor : AuthenticAMD
Family : 15
Model : 4
Revision : 2
Name : AMD Turion(tm) 64 Mobile ML-28
Features : fpu vme de pse tsc msr pae mce cxchg8 apic sep mtrr pge mca cmov pat pse36 clfl mmx fxsr sse sse2 sse3


Data TLB (2 MB and 4 MB pages): Fully associative, 8 entries
Instruction TLB (2 MB and 4 MB pages): Fully associative, 8 entries
Data TLB (4 KB pages): Fully associative, 32 entries
Instruction TLB (4 KB pages): Fully associative, 32 entries
1st-level instr cache: 64 KBytes, 2-way set associative, 64 byte line size
1st-level data cache: 64 KBytes, 2-way set associative, 64 byte line size
2nd-level cache: 512 KBytes, 8-way set associative, 64 byte line size

Please wait!!!

Frequency [MHz]: 798
16 bit addition [million/sec] : 800
32 bit addition [million/sec] : 795
16 bit multiply [million/sec] : 265
32 bit multiply [million/sec] : 265
RAM read test [mill DW/sec] : 1564
RAM write test [mill DW/sec] : 800
Stack [mill of push&pop/sec] : 397
FPU Additions [100 000/sec] : 1624
FPU Multiply [100 000/sec] : 1473
FPU Square root [10 000/sec] : 816
FPU Sinus [10 000/sec] : 791
Post 11 May 2006, 11:55
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Kuemmel



Joined: 30 Jan 2006
Posts: 198
Location: Stuttgart, Germany
Kuemmel
Hi there, here are 2 from me: AMD Sempron Mobile 3100+ and Athlon K7 1000 MHz:
Code:
Basic CPUID info:
~~~~~~~~~~~~~~~~~
Vendor    : AuthenticAMD
Family    : 6
Model     : 4
Revision  : 2
Name      : AMD Athlon(tm) Processor
Features  : fpu vme de pse tsc msr pae mce cxchg8 sep mtrr pge mca cmov pat pse3
6 mmx fxsr


Data TLB (2 MB and 4 MB pages):4-way set associative, 8 entries
Instruction TLB (2 MB and 4 MB pages): Fully associative, 8 entries
Data TLB (4 KB pages): Fully associative, 24 entries
Instruction TLB (4 KB pages): Fully associative, 16 entries
1st-level instr cache: 64 KBytes, 2-way set associative, 64 byte line size
1st-level data cache: 64 KBytes, 2-way set associative, 64 byte line size
2nd-level cache: 256 KBytes, 8-way set associative, 64 byte line size

Please wait!!!

Frequency [MHz]: 1010
16 bit addition [million/sec] : 1000
32 bit addition [million/sec] : 1000
16 bit multiply [million/sec] : 333
32 bit multiply [million/sec] : 250
RAM read test [mill DW/sec]   : 1962
RAM write test [mill DW/sec]  : 1000
Stack [mill of push&pop/sec]  : 498
FPU Additions [100 000/sec]   : 2044
FPU Multiply [100 000/sec]    : 1924
FPU Square root [10 000/sec]  : 1334
FPU Sinus [10 000/sec]        : 1409
    

Code:
Basic CPUID info:
~~~~~~~~~~~~~~~~~
Vendor    : AuthenticAMD
Family    : 15
Model     : 12
Revision  : 0
Name      : Mobile AMD Sempron(tm) 3100+
Features  : fpu vme de pse tsc msr pae mce cxchg8 apic sep mtrr pge mca cmov pat
 pse36 clfl mmx fxsr sse sse2


Data TLB (2 MB and 4 MB pages): Fully associative, 8 entries
Instruction TLB (2 MB and 4 MB pages): Fully associative, 8 entries
Data TLB (4 KB pages): Fully associative, 32 entries
Instruction TLB (4 KB pages): Fully associative, 32 entries
1st-level instr cache: 64 KBytes, 2-way set associative, 64 byte line size
1st-level data cache: 64 KBytes, 2-way set associative, 64 byte line size
2nd-level cache: 256 KBytes, 8-way set associative, 64 byte line size

Please wait!!!

Frequency [MHz]: 1795
16 bit addition [million/sec] : 1805
32 bit addition [million/sec] : 1803
16 bit multiply [million/sec] : 595
32 bit multiply [million/sec] : 598
RAM read test [mill DW/sec]   : 3565
RAM write test [mill DW/sec]  : 1779
Stack [mill of push&pop/sec]  : 895
FPU Additions [100 000/sec]   : 3669
FPU Multiply [100 000/sec]    : 3372
FPU Square root [10 000/sec]  : 1857
FPU Sinus [10 000/sec]        : 1779
    
Post 11 May 2006, 21:02
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peter



Joined: 09 May 2006
Posts: 63
peter
Hmm, my Pentium M seems to be slower than AMD processors with the same frequency, especially on FPU operations Sad .
Code:
Basic CPUID info:
~~~~~~~~~~~~~~~~~
Vendor    : GenuineIntel
Family    : 6
Model     : 13
Revision  : 8
Name      :         Intel(R) Pentium(R) M processor 1.50GHz
Features  : fpu vme de pse tsc msr pae mce cxchg8 apic sep mtrr pge mca cmov pat clfl dtes acpi mmx fxsr sse sse2 ss tm1 est tm2

Instruction TLB: 4 KByte Pages, 4-way set associative, 128 entries
Instruction TLB: 4 MByte Pages, 4-way set associative, 2 entries
Data TLB: 4 KByte Pages, 4-way set associative, 128 entries
Data TLB: 4 MByte Pages, 4-way set associative, 8 entries
1st-level instruction cache: 32 KBytes, 8-way set associative, 64 byte line size
1st-level data cache: 32 KBytes, 8-way set associative, 64 byte line size
2nd-level cache: 2 MByte, 8-way set associative, 64byte line size
64-Byte Prefetching

Please wait!!!

Frequency [MHz]: 1496
16 bit addition [million/sec] : 1509
32 bit addition [million/sec] : 1493
16 bit multiply [million/sec] : 376
32 bit multiply [million/sec] : 375
RAM read test [mill DW/sec]   : 1510
RAM write test [mill DW/sec]  : 1492
Stack [mill of push&pop/sec]  : 700
FPU Additions [100 000/sec]   : 68
FPU Multiply [100 000/sec]    : 67
FPU Square root [10 000/sec]  : 469
FPU Sinus [10 000/sec]        : 460
    
Post 12 May 2006, 08:16
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madmatt



Joined: 07 Oct 2003
Posts: 1046
Location: Michigan, USA
madmatt
Here's my results (fpu slowness could be caused by slow memory access):
Quote:
Basic CPUID info:
~~~~~~~~~~~~~~~~~
Vendor : GenuineIntel
Family : 15
Model : 2
Revision : 9
Name : Intel(R) Celeron(R) CPU 2.70GHz
Features : fpu vme de pse tsc msr pae mce cxchg8 apic sep mtrr pge mca cmov pat
pse36 clfl dtes acpi mmx fxsr sse sse2 ss htt tm1 cnxt-id

Instruction TLB: 4 KByte and 2-MByte or 4-MByte pages, 128 entries
Data TLB: 4 KByte and 4 MByte pages, 64 entries
1st-level data cache: 8 KByte, 4-way set associative, 64 byte line size
No 2nd-level cache or, if processor contains a valid 2nd-level cache, no
3rd-level cache
Trace cache: 12 K-╡op, 8-way set associative

Please wait!!!

Frequency [MHz]: 2699
16 bit addition [million/sec] : 5347
32 bit addition [million/sec] : 5347
16 bit multiply [million/sec] : 178
32 bit multiply [million/sec] : 191
RAM read test [mill DW/sec] : 2670
RAM write test [mill DW/sec] : 1525
Stack [mill of push&pop/sec] : 895
FPU Additions [100 000/sec] : 25
FPU Multiply [100 000/sec] : 25
FPU Square root [10 000/sec] : 153
FPU Sinus [10 000/sec] : 154
Post 13 May 2006, 11:36
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zubi



Joined: 27 Apr 2006
Posts: 26
Location: Turkey
zubi
Code:
Basic CPUID info:
~~~~~~~~~~~~~~~~~
Vendor    : GenuineIntel
Family    : 15
Model     : 2
Revision  : 9
Name      :               Intel(R) Pentium(R) 4 CPU 2.60GHz
Features  : fpu vme de pse tsc msr pae mce cxchg8 apic sep mtrr pge mca cmov pat
 pse36 clfl dtes acpi mmx fxsr sse sse2 ss htt tm1 cnxt-id

Instruction TLB: 4 KByte and 2-MByte or 4-MByte pages, 64 entries
Data TLB: 4 KByte and 4 MByte pages, 64 entries
1st-level data cache: 8 KByte, 4-way set associative, 64 byte line size
2nd-level cache: 512 KByte, 8-way set associative, 64 byte line size, 2 lines pe
r sector
No 2nd-level cache or, if processor contains a valid 2nd-level cache, no 3rd-lev
el cache
Trace cache: 12 K-Áop, 8-way set associative

Please wait!!!

Frequency [MHz]: 2612
16 bit addition [million/sec] : 5347
32 bit addition [million/sec] : 5141
16 bit multiply [million/sec] : 173
32 bit multiply [million/sec] : 186
RAM read test [mill DW/sec]   : 2614
RAM write test [mill DW/sec]  : 1489
Stack [mill of push&pop/sec]  : 876
FPU Additions [100 000/sec]   : 25
FPU Multiply [100 000/sec]    : 25
FPU Square root [10 000/sec]  : 149
FPU Sinus [10 000/sec]        : 150
    



I'm having hard time understanding those figures. How could FPU operations be that slow compared to other results with slower cpus posted here? Also, how come on amd processors fpu operations are faster than normal operations?
Post 13 May 2006, 12:59
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kuscsikp



Joined: 07 May 2006
Posts: 19
kuscsikp
16 bit addition [million/sec] :
million of
"add *x, *x"
32 bit addition [million/sec] :
million of
"add e*x, e*x"
16 bit multiply [million/sec] :
"imul *x, *x"
32 bit multiply [million/sec] :
"imul e*x, e*x"
RAM read test [mill DW/sec] :
mov ecx, dword [*] //where * is constant value!!!
RAM write test [mill DW/sec] :
mov dword [*], ecx //where * is constant value!!!
Stack [mill of push&pop/sec] :
push e*x
pop e*x
FPU Additions [100 000/sec] :
fadd qword [fpu_data0]
fadd qword [fpu_data1]
fadd qword [fpu_data2]
.
.
.
fadd qword [fpu_datan] //where fpu_datas are in a predefined table
FPU Multiply [100 000/sec] :
same as fadd but replaced with fmul
FPU Square root [10 000/sec] :
fld qword [fpu_data0]
fsqrt
fld qword [fpu_data1]
fsqrt
.
.
.

FPU Sinus [10 000/sec] :
fld qword [fpu_data0]
fsin
fld qword [fpu_data1]
fsin
.
.
.
Post 13 May 2006, 14:31
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kuscsikp



Joined: 07 May 2006
Posts: 19
kuscsikp
I don't know why are the Intel CPUs so slow.
Maybe it is a bug in my code, i don't know Sad
Post 13 May 2006, 14:42
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UCM



Joined: 25 Feb 2005
Posts: 285
Location: Canada
UCM
Here are my results.
procb wrote:

Basic CPUID info:
~~~~~~~~~~~~~~~~~
Vendor : AuthenticAMD
Family : 15
Model : 11
Revision : 1
Name : AMD Athlon(tm) 64 X2 Dual Core Processor 4200+
Features : fpu vme de pse tsc msr pae mce cxchg8 apic sep mtrr pge mca cmov pat pse36 clfl mmx fxsr sse sse2 htt sse3


Data TLB (2 MB and 4 MB pages): Fully associative, 8 entries
Instruction TLB (2 MB and 4 MB pages): Fully associative, 8 entries
Data TLB (4 KB pages): Fully associative, 32 entries
Instruction TLB (4 KB pages): Fully associative, 32 entries
1st-level instr cache: 64 KBytes, 2-way set associative, 64 byte line size
1st-level data cache: 64 KBytes, 2-way set associative, 64 byte line size
2nd-level cache: 512 KBytes, 8-way set associative, 64 byte line size

Please wait!!!

Frequency [MHz]: 2188
16 bit addition [million/sec] : 2068
32 bit addition [million/sec] : 2066
16 bit multiply [million/sec] : 688
32 bit multiply [million/sec] : 688
RAM read test [mill DW/sec] : 1377
RAM write test [mill DW/sec] : 1377
Stack [mill of push&pop/sec] : 2034
FPU Additions [100 000/sec] : 4273
FPU Multiply [100 000/sec] : 3773
FPU Square root [10 000/sec] : 2134
FPU Sinus [10 000/sec] : 2100

Windows XP SP2, btw.

_________________
This calls for... Ultra CRUNCHY Man!
Ta da!! *crunch*
Post 13 May 2006, 19:35
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kuscsikp



Joined: 07 May 2006
Posts: 19
kuscsikp
Some values very low!
Have you run it with administrator righs?
Is the cache enabled?
Post 13 May 2006, 19:49
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UCM



Joined: 25 Feb 2005
Posts: 285
Location: Canada
UCM
admin: yes.
cache: yes.
Post 15 May 2006, 21:46
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sylwek32



Joined: 27 Apr 2006
Posts: 339
sylwek32
Basic CPUID info:
~~~~~~~~~~~~~~~~~
Vendor : GenuineIntel
Family : 6
Model : 8
Revision : 6
Name :
Features : fpu vme de pse tsc msr pae mce cxchg8 sep mtrr pge mca cmov pat pse36 mmx fxsr sse

Instruction TLB: 4 KByte Pages, 4-way set associative, 32 entries
Instruction TLB: 4 MByte Pages, 4-way set associative, 2 entries
Data TLB: 4 KByte Pages, 4-way set associative, 64 entries
Data TLB: 4 MByte Pages, 4-way set associative, 8 entries
1st-level instruction cache: 16 KBytes, 4-way set associative, 32 byte line size
1st-level data cache: 16 KBytes, 4-way set associative, 32 byte line size
2nd-level cache: 256 KByte, 8-way set associative, 32 byte line size

Please wait!!!

Frequency [MHz]: 997
16 bit addition [million/sec] : 985
32 bit addition [million/sec] : 985
16 bit multiply [million/sec] : 248
32 bit multiply [million/sec] : 248
RAM read test [mill DW/sec] : 977
RAM write test [mill DW/sec] : 907
Stack [mill of push&pop/sec] : 983
FPU Additions [100 000/sec] : 85
FPU Multiply [100 000/sec] : 85
FPU Square root [10 000/sec] : 435
FPU Sinus [10 000/sec] : 439
Post 16 May 2006, 13:21
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sylwek32



Joined: 27 Apr 2006
Posts: 339
sylwek32
I´ve got DUAL Tyan Tiger board with 2 x Athlon MP 2000 and 1024MB of Infeon DDR Ram!

And thats the sh/tty result:
Frequency [MHz]: 1666
16 bit addition [million/sec] : 1663
32 bit addition [million/sec] : 1663
16 bit multiply [million/sec] : 554
32 bit multiply [million/sec] : 417
RAM read test [mill DW/sec] : 1103
RAM write test [mill DW/sec] : 1104
Stack [mill of push&pop/sec] : 1663
FPU Additions [100 000/sec] : 3372
FPU Multiply [100 000/sec] : 3125
FPU Square root [10 000/sec] : 1755
FPU Sinus [10 000/sec] : 1803

what´s going wrong ?
Doesnt it support Multiprocessors ?
Post 03 Jun 2006, 23:18
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LocoDelAssembly
Your code has a bug


Joined: 06 May 2005
Posts: 4633
Location: Argentina
LocoDelAssembly
This test is single threaded and for that reason it uses only one processor at a time.
Post 03 Jun 2006, 23:34
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WiESi



Joined: 15 May 2006
Posts: 14
Location: Austria
WiESi
Basic CPUID info:
~~~~~~~~~~~~~~~~~
Vendor : GenuineIntel
Family : 15
Model : 2
Revision : 9
Name : Intel(R) Pentium(R) 4 CPU 2.80GHz
Features : fpu vme de pse tsc msr pae mce cxchg8 apic sep mtrr pge mca cmov pat
pse36 clfl dtes acpi mmx fxsr sse sse2 ss htt tm1 cnxt-id

Instruction TLB: 4 KByte and 2-MByte or 4-MByte pages, 64 entries
Data TLB: 4 KByte and 4 MByte pages, 64 entries
1st-level data cache: 8 KByte, 4-way set associative, 64 byte line size
2nd-level cache: 512 KByte, 8-way set associative, 64 byte line size, 2 lines pe
r sector
No 2nd-level cache or, if processor contains a valid 2nd-level cache, no 3rd-lev
el cache
Trace cache: 12 K-Áop, 8-way set associative

Please wait!!!

Frequency [MHz]: 2793
16 bit addition [million/sec] : 5586
32 bit addition [million/sec] : 5571
16 bit multiply [million/sec] : 185
32 bit multiply [million/sec] : 199
RAM read test [mill DW/sec] : 2789
RAM write test [mill DW/sec] : 1581
Stack [mill of push&pop/sec] : 1883
FPU Additions [100 000/sec] : 27
FPU Multiply [100 000/sec] : 27
FPU Square root [10 000/sec] : 160
FPU Sinus [10 000/sec] : 160

_________________
JavaAmp
Post 04 Jun 2006, 06:51
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donkey7



Joined: 31 Jan 2005
Posts: 127
Location: Poland, Malopolska
donkey7
Quote:

FPU Additions [100 000/sec] :
fadd qword [fpu_data0]
fadd qword [fpu_data1]
fadd qword [fpu_data2]
.
.
.
fadd qword [fpu_datan] //where fpu_datas are in a predefined table
FPU Multiply [100 000/sec] :
same as fadd but replaced with fmul
FPU Square root [10 000/sec] :
fld qword [fpu_data0]
fsqrt
fld qword [fpu_data1]
fsqrt
.
.
.

FPU Sinus [10 000/sec] :
fld qword [fpu_data0]
fsin
fld qword [fpu_data1]
fsin
.
.
.

maybe intel scores worse because it handles fpu exceptions slower? in this code there are many fpu exceptions (stack overflows).

possible errors:
in fadd you haven't loaded any value onto stack - fld1
in fmul you haven't freed stack - ffree st0
in sqrt you should add ffree st0 after each fsqrt
in fsin you should add ffree st0 after each fsin

maybe after this modifications results will be more representative...
Post 04 Jun 2006, 08:54
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