flat assembler
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> Non-x86 architectures > LDM - Thumb encoding |
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bitRAKE 01 Sep 2023, 04:15
(Note: I'm not familiar with this material.)
GPT-4 says: The ARM7TDMI processor supports the ARMv4T architecture, which includes both ARM and Thumb instruction sets. The LDM/LDMIA instruction is indeed supported in the ARM instruction set, but in the Thumb instruction set of ARMv4T, the LDM instruction is more restricted. For ARM7TDMI in Thumb mode, LDM can only load a subset of registers and is usually formatted like this: Code: LDMIA Rb!, {Rlist} - Rlist is a list of registers to be loaded, and it cannot include PC or SP. However, you can't load {r0 - r7} using a single LDM instruction in Thumb mode on an ARM7TDMI. You'll need to use multiple instructions or switch to ARM mode for that specific requirement. So, your error message is correct; ldm.n r7, {r0 - r7} is not a valid Thumb instruction on the ARM7TDMI processor. This is the solution recommended by GPT-4: Yes, you can work around the limitations by reorganizing your register usage. The LDM instruction in Thumb mode for ARM7TDMI will allow you to load multiple low registers (r0-r7) from the base register, but you have to be cautious about which base register you're using. Here's how you might perform the equivalent operation using LDM in Thumb mode, assuming you're using a different base register (r8, for example): 1. Move r7 to r8 to use r8 as the base register. Code: MOV r8, r7 2. Use LDMIA to load r0-r7 from the memory pointed to by r8. Code: LDMIA r8!, {r0-r7} Last edited by bitRAKE on 01 Sep 2023, 04:26; edited 1 time in total |
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01 Sep 2023, 04:15 |
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dsg 01 Sep 2023, 04:23
I appreciate the reply!
It seems the {Rlist} is really only one register, so THUMB 'load multiple' doesn't actually load multiple registers. I have tried using a comma separated list as well that gives the same error as above. |
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01 Sep 2023, 04:23 |
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bitRAKE 01 Sep 2023, 04:27
Sorry, I added GPT-4's solution recommendation. Does that work?
GPT-4 wrote: So, to answer your question: Yes, you can perform the operation using LDMIA in Thumb mode, but you'll need to ensure that the base register is not in the list of registers you're loading. Last edited by bitRAKE on 01 Sep 2023, 04:41; edited 1 time in total |
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01 Sep 2023, 04:27 |
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revolution 01 Sep 2023, 04:33
Ignore the GPT nonsense.
The instruction is perfectly fine. Code: printf 'thumb \n ldm.n r7,{r0-r7}' | fasmarm - | hd 00000000 ff cf |..| 00000002 |
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01 Sep 2023, 04:33 |
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dsg 01 Sep 2023, 04:39
in 'armdoc/InstructionFormatsTHUMB16.asm' the example for ldm has only one register in the list:
ldm r0!,{r1} ldm r0!,{r0} But, the examples for stm has one with a comma separated list: stm r0!,{r1} stm r0!,{r1,r2} And no chatgpt's solution does not work. Appreciate the responses! |
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01 Sep 2023, 04:39 |
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dsg 01 Sep 2023, 04:43
hey guys just an update, using the instruction with the '!' on the base register assembles everything correctly:
ldm.n r5!, {r0 - r3} i appreciate all the help! |
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01 Sep 2023, 04:43 |
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bitRAKE 01 Sep 2023, 04:46
GPT-4 makes up stuff all the time - especially with assembly languages. It does okay with some high-level languages. This is probably due to language proportions in the training data. Thank you for trying, I like to keep track of where it fails - I'll retry this subject domain in the future.
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01 Sep 2023, 04:46 |
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revolution 01 Sep 2023, 04:48
If you add the ! then you can't also have the register in the source list.
Code: printf 'thumb \n ldm.n r7!,{r0-r7}' | fasmarm - | hd - [2]: processed: ldm.n r7!,{r0-r7} error: Instruction not encodable in THUMB. Code: printf 'thumb \n ldm.n r7,{r0,r1-r3,r4,r5-r7}' | fasmarm - | hd 00000000 ff cf |..| 00000002 |
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01 Sep 2023, 04:48 |
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dsg 01 Sep 2023, 04:51
That is strange:
ldm.n r7!, {r0 - r7} assembles with no error for me. Perhaps this is due to using 'CODE16' instead of 'THUMB'? edit: It also works correctly, it overwrites the address in r7 with the values loaded from memory. |
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01 Sep 2023, 04:51 |
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revolution 01 Sep 2023, 04:55
That is correct. The older non-thumb syntax (code16) requires the ! and then ignores it if the register is in the list. The newer thumb syntax explicitly requires the precise register usage case.
Code: printf 'code16 \n ldm.n r7,{r0,r1-r3,r4,r5-r7}' | fasmarm - | hd - [2]: processed: ldm.n r7,{r0,r1-r3,r4,r5-r7} error: Instruction not encodable in THUMB. printf 'code16 \n ldm.n r7!,{r0,r1-r3,r4,r5-r7}' | fasmarm - | hd 00000000 ff cf |..| 00000002 |
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01 Sep 2023, 04:55 |
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revolution 01 Sep 2023, 04:59
This was changed when ARM defined the Universal Assembly Language (UAL) syntax.
code16 is pre-UAL, and thumb is UAL. |
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01 Sep 2023, 04:59 |
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dsg 01 Sep 2023, 05:09
armdoc/InstructionFormatsTHUMB16.asm shows ldm under the pre-UAL w/ an exclamation and under the THUMB section ldm is shown without the exclamation. seems this was the pitfall I got stuck in.
cheers! |
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01 Sep 2023, 05:09 |
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revolution 01 Sep 2023, 07:53
Pre-UAL syntax is confusing (IMO) and inconsistent, especially when using IT blocks.
UAL syntax is consistent and unambiguous. A WYSIWYG syntax, I recommend using only THUMB mode (UAL) for all new code. And only use CODE16 if you have old code you need to support. |
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01 Sep 2023, 07:53 |
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