DS: prefix not generated for some 16-bit address modes

Index > Compiler Internals > DS: prefix not generated for some 16-bit address modes

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PopeInnocent

Joined: 01 Jan 2004
Posts: 18
Location: USA

PopeInnocent 21 Jul 2005, 20:27

The following instructions should generate identical machine code:

Code:

mov ax,[ds:si+bp]
mov ax,[ds:bp+si]

FASM 1.62 does not generate a DS: prefix for the first instruction. My understanding is that a 16-bit address with BP in it is always relative to the SS segment unless an override is present, so FASM should generate prefixes for those modes.

This appears to be an issue in any 16-bit addressing mode where BP is not the first register to appear in the address. For example,

Code:

mov ax,[ds:di+bp]
mov ax,[ds:10+si+bp]

-- Craig Putnam

21 Jul 2005, 20:27

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20761
Location: In your JS exploiting you and your system

revolution 22 Jul 2005, 02:10

You are correct. The Intel manual states that for 16 bit addressing:

Quote:

The default segment register is SS for the effective addresses containing a BP index, DS for other effective
addresses.

22 Jul 2005, 02:10

vid
Verbosity in development

Joined: 05 Sep 2003
Posts: 7103
Location: Slovakia

vid 22 Jul 2005, 07:31

Quote:

The default segment register is SS for the effective addresses containing a BP index, DS for other effective
addresses.

And what about SP then?

22 Jul 2005, 07:31

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20761
Location: In your JS exploiting you and your system

revolution 22 Jul 2005, 07:45

Quote:

And what about SP then?

SP cannot be used for explicit addressing, remember in 16 bit we only have BX, SI, DI and BP. of course push, pop, call and ret all use SS by default but that is not using "effective addressing mode".

22 Jul 2005, 07:45

vid
Verbosity in development

Joined: 05 Sep 2003
Posts: 7103
Location: Slovakia

vid 22 Jul 2005, 07:50

oh yes, too much time spent in 32bits. sorry.

22 Jul 2005, 07:50

revolution
When all else fails, read the source

Joined: 24 Aug 2004
Posts: 20761
Location: In your JS exploiting you and your system

revolution 22 Jul 2005, 09:18

Hehe, my boss doesn't know but I took a bit of time to look into this:

Here is a fix for you:

Code:

;find this label around line 5742 in X86_64.INC
store_segment_prefix_if_necessary:
        mov     al,[segment_register]
        or      al,al
        jz      segment_prefix_ok
;insert the following 6 lines 
        cmp     [code_type],16
        jnz     segment_prefix_not_16bit
        cmp     bl,25h
        jnz     segment_prefix_not_16bit
        xchg    bh,bl
      segment_prefix_not_16bit:
;and the rest of the code follows on from here
        cmp     al,3
        je      ss_prefix
        cmp     al,4
;....

test it with this:

Code:

use16
mov ax,[ds:si+bp]
mov ax,[ds:bp+si]
mov ax,[es:si+bp]
mov ax,[es:bp+si]
mov ax,[ss:si+bp]
mov ax,[ss:bp+si]
mov ax,[cs:si+bp]
mov ax,[cs:bp+si]

BTW: this is not a fix for 32 bit mode with 16 bit address override (67h). I will leave the real fix to the author.

22 Jul 2005, 09:18

Tomasz Grysztar

Joined: 16 Jun 2003
Posts: 8466
Location: Kraków, Poland

Tomasz Grysztar 26 Jul 2005, 08:57

Thanks, I will release a fix soon.

26 Jul 2005, 08:57

Tomasz Grysztar

Joined: 16 Jun 2003
Posts: 8466
Location: Kraków, Poland

Tomasz Grysztar 28 Jul 2005, 15:17

Fixed in 1.63.2.

28 Jul 2005, 15:17

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