I remember reading that crossing domains (e.g, gpr to x87 related) was bad for performance, but is those like xword, yword, or zword registers via vpinsrt also expensive? I have made some macros to make a "stack" in some of those registers for parts of a codebase thinking that it'd be better than using push/pop as they'd use memory. Which is sound, but if the domain cross penalty is significant, the cost of moving to memory will be lower than using a few push/pop.

And is vpinsrt OoO friendly? Like, if I am inserting on a yword on different lanes, it should be OoO possible. But I am unsure, and I myself couldn't find sources for it. I searched through intel sources and couldn't manage to find data about it.

Idk if this behavior is documented and/or ensured, but just in case, I guess it is decent to ask.

All those metrics need to be measured because they are CPU dependant. CPU architectures can differ greatly from each other. Identify each target system and measure code in various paths to determine which works best for each system.

However IME push/pop are very efficient, even though they "use memory". The stack is the hottest place in the CPU and is right there in L1 cache (and on some CPUs can access the load/store buffers for even greater performance).

So the answer to whether that "stack in simd" is efficient would be: "uhh... depends"? Also, AI once mentioned a "stack engine", is it a canonical thing? Couldn't find data regarding such too. Perhaps that's just a rumor or practical thing that exist on some CPUs

Yup. It depends. There is no fixed answer that applies everywhere. There are only guesses and heuristics. The only way to know for sure if it is right for each system is to measure it and compare each option.