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flat assembler > Main > Stack Realignment "Techniques"

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system error



Joined: 01 Sep 2013
Posts: 671
Furs wrote:
I thought I was pretty clear about a gcc.godbolt.org link so I can verify it. I guess the style of "programming" you do fits perfectly: Googling for others' work. I don't even know the GCC version used -- or the settings used -- how can it be verified? It could be a hand-written asm file for all you know.

Also, you forgot 3)

3) [esp+0] aligned to 32 bytes

Deal with it.


Why should I bother about producing code for you. My code or not, it's a legit ASSEMBLY LISTING emitted by C. You already burnt down your house for that enormous pressure dealing with my TESTER1 and TESTER2!! and that's just my PSEUDOCODE.

The worse part it, I am terrorizing you in your own thread where you're supposed to impress people with "know-all" attitude!! <<<------ HAHAHAHAHA!! xD
Post 29 Aug 2017, 14:52
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system error



Joined: 01 Sep 2013
Posts: 671
Hahahahaha! OMG, I am so loving this! xD
Post 29 Aug 2017, 14:55
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Furs



Joined: 04 Mar 2016
Posts: 1315
system error wrote:
Why should I bother about producing code for you.
You made the claim, burden of proof is on you. So prove it. If you don't want to bother, don't make claims, and shut up? Easy enough. In fact, you typed way more and "bothered" way more with nonsensical bullshit than it would take you to write a simple C code to prove your point. But you can't. All you can type is 1) bullshit 2) pseudo code 3) google searches.

system error wrote:
My code or not, it's a legit ASSEMBLY LISTING emitted by C.
^ see above. Prove it. I see a copy-paste from a *book* (your link).

I will say it one last time: prove it, or shut it. If you won't, then we have nothing further to discuss.

And no, unless it's exactly the requirements I put up for a proof (verified on gcc.godbolt.org, and you can try with GCC 6.3.0 because that's what I used, but you must say which version if you do otherwise and exact command line options -- but use a recent GCC version, not an ancient one I don't have available -- either way, if it is proper in older versions of GCC that's a good thing, it means it was a "regression" so it has more potential to be accepted when I submit the patch), I will not bother to look at it unless you qualify ALL those criteria.

I've spent enough time on your tirade, so I'm done here. (I love how ignorant you are about others, when 2 other people already told you to get lost)
Post 29 Aug 2017, 15:04
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system error



Joined: 01 Sep 2013
Posts: 671
Oh, hello Furs, are you hiding again!!???

How about sending that "special technique patch" to those GCC people? Show them your high assembly programming skill, buddy! That should "teach" them a lesson!!! <<---- hahahahaha XD
Post 29 Aug 2017, 15:07
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Furs



Joined: 04 Mar 2016
Posts: 1315
But you told me last time to "not send it" or something because you were afraid? So which one is it? Wink

First I need to make a patch to justify it by reducing the frame size, obviously, (i.e. from 64 to 36 in this example), otherwise it won't get accepted since it's useless. Though it does work currently in my plugin which I verify first with.
Post 29 Aug 2017, 15:09
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system error



Joined: 01 Sep 2013
Posts: 671
Furs wrote:
system error wrote:
Why should I bother about producing code for you.
You made the claim, burden of proof is on you. So prove it. If you don't want to bother, don't make claims, and shut up? Easy enough. In fact, you typed way more and "bothered" way more with nonsensical bullshit than it would take you to write a simple C code to prove your point. But you can't. All you can type is 1) bullshit 2) pseudo code 3) google searches.

system error wrote:
My code or not, it's a legit ASSEMBLY LISTING emitted by C.
^ see above. Prove it. I see a copy-paste from a *book* (your link).

I will say it one last time: prove it, or shut it. If you won't, then we have nothing further to discuss.

And no, unless it's exactly the requirements I put up for a proof (verified on gcc.godbolt.org, and you can try with GCC 6.3.0 because that's what I used, but you must say which version if you do otherwise and exact command line options -- but use a recent GCC version, not an ancient one I don't have available -- either way, if it is proper in older versions of GCC that's a good thing, it means it was a "regression" so it has more potential to be accepted when I submit the patch), I will not bother to look at it unless you qualify ALL those criteria.

I've spent enough time on your tirade, so I'm done here. (I love how ignorant you are about others, when 2 other people already told you to get lost)


Proof proof proof!! xD

1. TESTER1 is proof
2. TESTER2 is proof
3. my link is proof, to show that I am not BIAS! I don't lie. I don't cheat.

So, altogether, I've already sent 3 "patches" to your INCOMPETENT BRAIN!!

All you need to do now is HIDE YOUR INCOMPETENT FACE!!

"special alignment technique" MY FOOT!! <<---- HAHAHAHA!! xD
Post 29 Aug 2017, 15:12
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Furs



Joined: 04 Mar 2016
Posts: 1315
gcc.godbolt.org
Post 29 Aug 2017, 15:17
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system error



Joined: 01 Sep 2013
Posts: 671
Furs wrote:
gcc.godbolt.org


Now what happen to you Furs??

From an extremely confident boasting mouthfuls down to a single line posting? Did I b1tchslap you THAT HARD, broh??! hahahaha xD
Post 30 Aug 2017, 03:17
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system error



Joined: 01 Sep 2013
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Furs wrote:
How do you fit a 32-byte vector plus a 4-byte int into 32 bytes again? What I literally said it won't fit in 32 bytes. Since it's 32+4 = 36 bytes minimum.


OMG! Can you believe this is a guy who is going to send a "patch" to GCC??

See my "tester1" you dumbFCUK!! xD
Post 30 Aug 2017, 03:23
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Furs



Joined: 04 Mar 2016
Posts: 1315
Furs wrote:
And no, unless it's exactly the requirements I put up for a proof (verified on gcc.godbolt.org, and you can try with GCC 6.3.0 because that's what I used, but you must say which version if you do otherwise and exact command line options -- but use a recent GCC version, not an ancient one I don't have available -- either way, if it is proper in older versions of GCC that's a good thing, it means it was a "regression" so it has more potential to be accepted when I submit the patch), I will not bother to look at it unless you qualify ALL those criteria.
Your tester1 fails the requirements, since it's not a C++ code that GCC can compile on godbolt. Suck it up.
Post 30 Aug 2017, 10:39
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system error



Joined: 01 Sep 2013
Posts: 671
Furs wrote:
Furs wrote:
And no, unless it's exactly the requirements I put up for a proof (verified on gcc.godbolt.org, and you can try with GCC 6.3.0 because that's what I used, but you must say which version if you do otherwise and exact command line options -- but use a recent GCC version, not an ancient one I don't have available -- either way, if it is proper in older versions of GCC that's a good thing, it means it was a "regression" so it has more potential to be accepted when I submit the patch), I will not bother to look at it unless you qualify ALL those criteria.
Your tester1 fails the requirements, since it's not a C++ code that GCC can compile on godbolt. Suck it up.


No it's you INCOMPETENT BRAIN that failed you so many times when dealing with low-level code.

So, where's the patch? Sent it yet? xD
Post 30 Aug 2017, 11:02
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system error



Joined: 01 Sep 2013
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Let's see WHEN the master-of-everything Furs send his patch to GCC maintainers to teach them a lesson or two on low-level codes.

Wake me up in 2020 xD
Post 30 Aug 2017, 11:04
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Furs



Joined: 04 Mar 2016
Posts: 1315
system error wrote:
So, where's the patch? Sent it yet? xD
I believe I've answered this already:
Furs wrote:
First I need to make a patch to justify it by reducing the frame size, obviously, (i.e. from 64 to 36 in this example), otherwise it won't get accepted since it's useless. Though it does work currently in my plugin which I verify first with.
You deserve no proper answer since you can't seem to read properly.




It looks kind of complicated to fix the sub esp, 64 unfortunately. It's deeply rooted into LRA/reload. The swap is easy to fix, but without that fix, the swap is useless (makes no difference). Problem is that even if I don't round up the stack, GCC will use [esp+32] for vector (which is invalid if I only have 36 bytes of space), because it rounds it up on every elimination iteration in reload.

So my problem right now is how to fix it from "sub esp, 64" and make it "sub esp, 36" before I fix the swap. (and before you ask, no, this is pure C code for RTL generation, there's zero assembly involved Rolling Eyes please spare me your asm "examples"). The entire prolog/epilog in GCC is in RTL not assembly. (LISP-like structures/language)
Post 30 Aug 2017, 11:19
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system error



Joined: 01 Sep 2013
Posts: 671
Furs wrote:
system error wrote:
So, where's the patch? Sent it yet? xD
I believe I've answered this already:
Furs wrote:
First I need to make a patch to justify it by reducing the frame size, obviously, (i.e. from 64 to 36 in this example), otherwise it won't get accepted since it's useless. Though it does work currently in my plugin which I verify first with.
You deserve no proper answer since you can't seem to read properly.

It looks kind of complicated to fix the sub esp, 64 unfortunately. It's deeply rooted into LRA/reload. The swap is easy to fix, but without that fix, the swap is useless (makes no difference). Problem is that even if I don't round up the stack, GCC will use [esp+32] for vector (which is invalid if I only have 36 bytes of space), because it rounds it up on every elimination iteration in reload.

So my problem right now is how to fix it from "sub esp, 64" and make it "sub esp, 36" before I fix the swap. (and before you ask, no, this is pure C code for RTL generation, there's zero assembly involved Rolling Eyes please spare me your asm "examples"). The entire prolog/epilog in GCC is in RTL not assembly. (LISP-like structures/language)


LRA, blah blah, LISP, blah blah RTL.

No, dumbfcuk! You have an extremely poor understanding on assembly language stack programming. So your "master of everything" blah blah don't sell. Not to me! Your comment in that "SUB ESP,64" says it all! Don't you get it dumbfcuk??

You should be thankful to me because I INTERCEPTED you from sending a pathetic "patch" to brilliant GCC people because that would be extremely embarrassing if they found out that you are actually from this board! Thank god!! hahahaha xD
Post 30 Aug 2017, 11:44
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
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system error: Please stop the name calling. If you have an argument to present then you are welcome to post it, but resorting to ad-hominem attacks is not welcome.
Post 30 Aug 2017, 11:52
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Furs



Joined: 04 Mar 2016
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@system error: Alright, since you're so "competent" (you love the other word), then please go send a patch to make GCC use sub esp, 36 (i.e. not round it up). Whether you like to or not, this is what GCC currently does (yes, GCC, not me):

1) sub esp, 64 (i.e. it rounds it up to multiple of the largest alignment on the stack, in this case, 36 rounded up to multiple of 32 due to vector on stack, hence 64; this is a *FACT* of what GCC does currently, so grow the fuck up).

2) at the same time, stop it from placing the vector at [esp+32], since without a sub esp, 64, such a thing is invalid

I said (2) since you're unable to comprehend simple english. You can't just change the prologue (i.e. just the sub insns) because then invalid code would be generated. In fact, you don't have to touch a single line of asm or RTL at all, since the calculation of the "frame size" is done in LRA/reload.

If you change only the sub (trivial), the vector will still be placed at [esp+32] (this is a fact of what GCC currently does, whether you like it or not). Needless to say, this is invalid code, as it accesses the return address and other stuff. Such a patch is quite complicated, not trivial as you think.


So please, since you're so much more competent than me as you claim, go send such a patch and make it use sub esp, 36 with vector at [esp]. Once your patch gets accepted I promise to you I will send the one that swaps the and with sub.

I will say it last time: this is about patch to GCC, which doesn't use any assembly in its source code (it must compile on tons of hosts and targets). Don't show me asm code, it totally misses the point hilariously.


Anyway, I'm completely done with this until you can show me your patch. This thread got its answer long ago on page 1, and frankly I'll ignore you like almost everyone else unless you have sensible arguments.
Post 30 Aug 2017, 12:00
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system error



Joined: 01 Sep 2013
Posts: 671
Furs wrote:
@system error: Alright, since you're so "competent" (you love the other word), then please go send a patch to make GCC use sub esp, 36 (i.e. not round it up).


Now you're asking me to send a patch to GCC??? Now this is genuinely funny! I am not the one so eager to patch anything to GCC. YOU DO! Burden-of-patch is ON YOU! This is not my "master of everyting" thread. I don't have problem with GCC! xD
Post 30 Aug 2017, 12:07
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system error



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Furs, sent your "special re-alignment technique" patch to GCC yet?

We are waiting for your expertise here.... don't let us down xD
Post 30 Aug 2017, 12:27
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Furs



Joined: 04 Mar 2016
Posts: 1315
What burden of proof?

It's simple: Don't call others incompetent when you can't do what they can do, because that makes you even more incompetent. And I'll work on the patch but it seems pretty troublesome (the LRA/reload alignment part), sigh.
Post 30 Aug 2017, 14:10
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system error



Joined: 01 Sep 2013
Posts: 671
Furs wrote:
What burden of proof?

It's simple: Don't call others incompetent when you can't do what they can do, because that makes you even more incompetent. And I'll work on the patch but it seems pretty troublesome (the LRA/reload alignment part), sigh.


No. The burden-of-patch xD

C'mon, where's the patch that you been trying to teach those brilliant GCC programmers? xD

Just to remind you that they also brilliant in other CPU as well, not just X86 CPUs, because their product is cross-platform. So I suggest you should also suggest your "patch" in for other CPUs as well (like ARM, PowerPC, Alpha, SPARC) because they can also run GCC. Or perhaps you thought that GCC engine is made up of x86 assembly language instructions? xD

You really are CLUELESS master of everything, aren't you? hehehehe xD
Post 31 Aug 2017, 05:04
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