Database listing in which CPU instruction first appeared?
Sometimes I'm having hard time figuring out in what processor a particular instruction first appeared (talking about IA-32 / Intel 64 / AMD64). Intel Manual doesn't provide this info most of the time, so I'm just surfing Internet in search of any mentions.
While I don't know about a list as organized as the one you posted I think the GCC manuals may have some of the information you are looking for. They have a list of CPU types and the instruction subsets supported by each of them. However, they only list instruction subsets so if you want to know when a particular instruction appeared you'll have to know to which instruction subset it belongs.
The Intel® Compilers 11.0 allow you to target the Intel® Atom™ processor using the /QxSSE3_ATOM or -xSSE3_ATOM compiler options. These options enable the generation of the movbe instruction which is unique to the Intel® Atom™ processor. However, there is sometimes a need to run such codes on a different processor such as the Intel® Pentium® III processor (for example, for validation purposes where an Intel® Atom™ processor isn't available). In these situations, the compiler provides the /Qinstruction:nomovbe (for Windows*) and -minstruction=nomovbe (for Linux*/Mac*) options to disable the generation of this instruction.
So' I'd expect it to be bonnell, not nehalem.
Apart from curiosity, I'm creating a framework for my future project based on fasmg engine. As one of the features it should allow selecting target cpu with a set of default options. But I don't want to take some list from nasm or gcc or whatever and blindly follow it. I just want to know exactly what I'm doing, so I have to gather information by crumbs and check and re-check it over and over again %)
The Jaguar core has support for the following instruction sets and instructions: MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, BMI1, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM (POPCNT/LZCNT), and AMD-V.
As an aside, Haswell adds a big-endian move instruction (MOVBE) that can convert to and from traditional x86 little-endian format (big-endian data stores the most significant byte first, while little endian stores the least significant byte first). This was originally introduced in Atom, and it was added to ensure full compatibility and improve performance for embedded applications.
The 4th generation Intel® Core™ processor family (codenamed Haswell) introduces support for many new instructions that are specifically designed to provide better performance to a broad range of applications such as: media, gaming, data processing, hashing, cryptography, etc. The new instructions can be divided into the following categories:
Intel® Advanced Vector Extensions 2 (Intel® AVX2)
Fused Multiply Add (FMA)
Bit Manipulation New Instructions (BMI)
MOVBE instruction (previously supported by the Intel® Atom™ processor)
Intel® Transactional Synchronization Extensions (Intel® TSX) (available in some models)
So, Haswell and newer processors from Intel support this instruction.
And it seems that FASMG doesn't support this instruction
You cannot post new topics in this forum You cannot reply to topics in this forum You cannot edit your posts in this forum You cannot delete your posts in this forum You cannot vote in polls in this forum You cannot attach files in this forum You can download files in this forum