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redsock



Joined: 09 Oct 2009
Posts: 251
Location: Australia
Online C/C++ -> assembler
Saw this on HN this morning during my news reading:

http://godbolt.org ... very useful IMO for seeing different compilers' ideas about optimisations, etc (and excellent followon/plaything for all of the various threads here on the board about HLL/compiler's being better than hand-coded, etc).

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Post 15 Dec 2016, 20:57
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Furs



Joined: 04 Mar 2016
Posts: 290
At first I thought it only supports non-optimized output but then I saw the compiler options part...

BTW, to do 32-bit code in GCC just add -m32 if anyone is interested like me.
Post 16 Dec 2016, 13:34
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Roman



Joined: 21 Apr 2012
Posts: 323
Second many asm commands !

My example:

Code:

mov eax,Number
mov ebx,eax
imul ebx





Thats all !
But thanks you for this.
Some times useful look output code from c++ example.
Post 19 Dec 2016, 12:40
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l4m2



Joined: 15 Jan 2015
Posts: 570

Code:
int sgn(int n) {
    return n<0?-1:n>0;
}


O3:

Code:
 cmp    DWORD PTR [esp+0x4],0x0
 jl     8048420 <sgn(int)+0x10>
 setg   al
 movzx  eax,al
 ret    
 xchg   ax,ax
 mov    eax,0xffffffff
 ret 


My solution:

Code:
cmp   edi0
setg  al
setl  ah
sub   alah
movsx eax,al


Code:
mov   eaxesi
shr   eax31
neg   esi
adc   eaxeax



Last edited by l4m2 on 25 Jan 2017, 16:26; edited 4 times in total
Post 25 Jan 2017, 13:07
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 14673
Location: Origae-6
Your solution incorrectly use or instead of adding. So it is not the same, the FLAGS can be different.

Edit: Oh wait, the ZF flag is undefined after MUL so your code is totally wrong!

Edit2: And even if ZF was defined, you might find that because of the latency from MUL the final result might not be any "faster". But you would have to check it in your app to see if it makes a measurable difference.
Post 25 Jan 2017, 13:12
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 6310
Location: Kraków, Poland
Well, the modern compilers are certainly already capable of compensating some of the shortcomings of the HLL syntax by creating optimizations similar in effect to what a programmer thinking in assembly may write. My classical example of such "assembly programmer thinking" was my snippet from the '90s that computed the sum of proper divisors of a number. It looked, as far as I remember, like this:

Code:
sum_divisors; in: edi = number, out: eax = sum of proper divisors
        mov     ecx,1
        xor     esi,esi
     add_divisor:
        add     esi,ecx
     next_divisor:
        inc     ecx
        mov     eax,edi
        xor     edx,edx
        div     ecx
        cmp     eax,ecx
        jb      done
        je      square_root
        test    edx,edx
        jnz     next_divisor
        add     esi,eax
        jmp     add_divisor
     done:
        mov     eax,esi
        ret
     square_root:
        test    edx,edx
        jnz     done
        add     eax,esi
        ret

There is a couple of assembly-specific constructions there, like triple branching (this is where there are two conditional jumps in a row) and the efficient use of both dividend and remainder obtained through a single division.
Out of curiosity I checked if I'd be able to write a C code that would get optimized to something similar, and what I got was often really close, though wildly varying between compilers and their versions. I think icc 16 made the fastest one (though not the nicest-looking):

Code:
sum_divisors(unsigned int):
        mov       esi1                                        #2.20
        mov       ecxesi                                      #2.30
..B1.2:                         # Preds ..B1.3 ..B1.1
        inc       esi                                           #4.7
        mov       eaxedi                                      #5.20
        xor       edxedx                                      #5.20
        div       esi                                           #5.20
        cmp       esieax                                      #7.16
        je        ..B1.6        # Prob 20%                      #7.16
        lea       r8dDWORD PTR [rcx+rax]                      #2.30
        add       r8desi                                      #4.7
        test      edxedx                                      #13.9
        cmove     ecxr8d                                      #13.9
        cmp       esieax                                      #15.18
        jb        ..B1.2        # Prob 82%                      #15.18
..B1.5:                         # Preds ..B1.3 ..B1.6
        mov       eaxecx                                      #16.12
        ret                                                     #16.12
..B1.6:                         # Preds ..B1.2                  # Infreq
        test      edxedx                                      #8.15
        jne       ..B1.5        # Prob 50%                      #8.15
        add       ecxesi                                      #8.29
        mov       eaxecx                                      #8.29
        ret                                                     #8.29

It appears to be even slightly faster than mine, perhaps thanks to the use of CMOV. Note that my snippet was only naïvely optimized, not taking into account any instruction sequencing rules of modern processors, just simply demonstrating the methods of thinking in assembly and structuring the code accordingly. I still believe that for larger programs the assembly-programming mindset allows to create efficient and beautiful code that would be very hard to obtain from the compilers (and that this may pay off even when no processor-specific optimizations are applied). But I acknowledge that at least on the level of functions like above one the compilers are already capable of generating code that looks almost as nice.
Post 28 Jan 2017, 23:38
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 14673
Location: Origae-6
As an aside: In ARM32 code this type of code is really easy to do nicely and concisely. All that jumping about can be eliminated with conditional predicates.

But for ARM64 code it is not so nice any more. It seems that the compilers were incapable of making good use of the ARM32 conditional predicates so ARM decided to remove most of them from the 64-bit instruction set (since they were "never" used). Sad It seems that hand-crafted assembly code is a dying art, and worse, the CPU instruction sets are being designed to match the HLL compilers capabilities. Crying or Very sad
Post 29 Jan 2017, 00:12
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 6310
Location: Kraków, Poland

revolution wrote:
As an aside: In ARM32 code this type of code is really easy to do nicely and concisely. All that jumping about can be eliminated with conditional predicates.

And this is exactly what was always the most appealing to me in this architecture. Then it's a pity that it was a wasted potential.
Post 29 Jan 2017, 16:03
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