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flat assembler > OS Construction > Quark MCU

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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 14469
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edfed wrote:
4: disassembly makes me hurt.

Gotta love those C compilers. Wasting your CPUs clocks since 1972.
Post 28 Dec 2016, 02:13
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edfed



Joined: 20 Feb 2006
Posts: 4155
Location: Thank you :D

revolution wrote:

edfed wrote:
4: disassembly makes me hurt.

Gotta love those C compilers. Wasting your CPUs clocks since 1972.

if only we could measure the power useage of all these "we have lots of ram, lots of cores, and lots of GHz"...

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Post 28 Dec 2016, 18:35
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nkeck72



Joined: 28 May 2015
Posts: 78
Location: 0000:7C00
Hmm, I wonder if it would be possible to make a 32-bit intel-based RasPi-type thing out of these? Sounds interesting.


Quote:


revolution wrote:

Quote:

edfed wrote:
4: disassembly makes me hurt.

Gotta love those C compilers. Wasting your CPUs clocks since 1972.


if only we could measure the power useage of all these "we have lots of ram, lots of cores, and lots of GHz"...



I feel you. I only use C when absolutely necessary, and even then minimally. I would rather use something like Python if I wanted something that high-level to be quite honest.

EDIT: Yes, I know Python is interpreted and not usually compiled. In that interpreted environment, however, I would expect about the same amount of overhead/wasted CPU cycles as that disassembled C code, or possibly more. If you wanna be inefficient it's better all than none Laughing [/quote]
Post 30 Dec 2016, 18:05
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marbol



Joined: 10 Mar 2017
Posts: 1
Location: Texas
Just saw this
I am trying to get a Quark SE C1000 dev board. That one seems to have 80k RAM and 192k * 2 of ROM, etc.

I usually like to use assembler too. But it appears that this thing doesn't come up in protected mode at all - I think you have to put it there yourself.

As soon as I get one of them, I'm going to make a commercial product out of one.
Post 10 Mar 2017, 21:23
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Trinitek



Joined: 06 Nov 2011
Posts: 202
Re: Just saw this

marbol wrote:
I usually like to use assembler too. But it appears that this thing doesn't come up in protected mode at all - I think you have to put it there yourself.

I'm understanding that it is not x86, and therefore has no concept of real/protected mode; your program is fully 32-bit. The only thing it has in common with x86 is a small subset of instructions.

But of course, the only way to find out for sure is to write some code for it. Smile Do report back.
Post 10 Mar 2017, 21:42
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 6179
Location: Kraków, Poland
Re: Just saw this

Trinitek wrote:

marbol wrote:
I usually like to use assembler too. But it appears that this thing doesn't come up in protected mode at all - I think you have to put it there yourself.

I'm understanding that it is not x86, and therefore has no concept of real/protected mode; your program is fully 32-bit. The only thing it has in common with x86 is a small subset of instructions.

It uses a pure 32-bit linear addressing with no paging, I'd say that it is the most similar to the 32-bit unreal mode minus segment registers. Except you do not have to set up anything.
Post 10 Mar 2017, 22:47
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neville



Joined: 13 Jul 2008
Posts: 491
Location: New Zealand
Re: Just saw this

Tomasz Grysztar wrote:
It uses a pure 32-bit linear addressing with no paging, I'd say that it is the most similar to the 32-bit unreal mode minus segment registers. Except you do not have to set up anything.

Ah, sounds like heaven! For me that's the most versatile and sensible CPU mode for hobbyist developers.

And some people might not realise that the so-called "16-bit" version of 32-bit unreal mode is just as good. All 32-bit registers and 32-bit addressing modes are available, just a few extra size override bytes in the code, but more often than not other factors result in binaries that are very similar in size. I call it 32-bit Flat Real Mode, and my hobby OS FAMOS is based on it.

I just googled the Quark SE C1000 and I get the impression Intel developed it as part of the chipset support for their "main" CPU's - for power management mainly. Although I'm not sure what they mean by "the edge" here?
http://www.intel.eu/content/www/eu/en/embedded/products/quark/mcu/se-soc/overview.html

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Post 11 Mar 2017, 09:24
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