Here is the new support for i8080/85 CPUs

I decided to put it separately from the old thread as it uses now fasmg not fasm and much more convenient in use. Bug reports welcome

New version uploaded.
[-] "$" issue fixed
[-] conditional return bug fixed
[+] old demo with library converted
(you may use Emu or Emu80 to run it, do not forget to press "G<Enter>" to start)

an integer square root of dword for i8080:

Code:

;======================================================================= ;   BC = SQRT(DEHL) ;----------------------------------------------------------------------- sqrt32: ;-----------------------------------------------------------------------     mvi  a,30 + 2     push psw  ; s+2     lxi  b, 0 ; y     push d    ; xh     push h    ; xl ;----------------------------------------------------------------------- .loop:     pop  h     pop  d     pop  psw     sui  2  ; a=s     rm ;-----------------------------------------------------------------------     push psw     push d     push h     mov  l,c     mov  h,b     dad  h     mov  c,l     mov  b,h ; BC=y=2*y ;-----------------------------------------------------------------------     lxi  d,0     dad  h     inx  h   ; DEHL=b=2*y+1 ;-----------------------------------------------------------------------     inr  a .shift:     dcr  a     jz   .skip     xchg     dad  h     jc   .loop     xchg     dad  h     jnc  .shift     inx  d     jmp  .shift     .skip:        ; DEHL << A=s ;-----------------------------------------------------------------------     push d     push h     lxi  h,4     dad  sp     xchg    ; DE --> X     lxi  h,0     dad  sp ; HL --> B ;-----------------------------------------------------------------------     ldax d     sub  m     mov  m,a     inx  h     inx  d     ldax d     sbb  m     mov  m,a     inx  h     inx  d     ldax d     sbb  m     mov  m,a     inx  h     inx  d     ldax d     sbb  m     mov  m,a ;-----------------------------------------------------------------------     pop  h     pop  d     jc   .loop ;-----------------------------------------------------------------------     xthl     pop  h     xchg     xthl     push d     inx  b     jmp  .loop     ;=======================================================================

a realisation of dividing to 10 via shifting.

the basic implementation was taken there:

Code:

unsigned divu10(unsigned n) {    unsigned q, r;    q = (n >> 1) + (n >> 2);    q = q + (q >> 4);    q = q + (q >> 8);    q = q + (q >> 16);    q = q >> 3;    r = n - q*10;    return q + ((r + 6) >> 4); // return q + (r > 9); }

ported to:

Code:

;======================================================================= ;   HL [DE] = HL/10   ;----------------------------------------------------------------------- proc udiv10 ;-----------------------------------------------------------------------     ora  a     mov  a,h     rar        mov  b,a     mov  a,l     rar     mov  c,a ; bc = n >> 1     ora  a     mov  a,b     rar     mov  d,a     mov  a,c     rar     add  c     mov  e,a     mov  c,a     mov  a,d     adc  b     mov  b,a     mov  d,a       ; bc = de = (hl>>1)+(hl>>2) = q     xchg           ; de = n     xra  a     call shr_hl.s4 ; hl = q >> 4      dad  b         ; hl = q = q + (q>>4)     mov  c,h     mvi  b,0     dad  b         ; hl = q = q + (q>>8)     xra  a     call shr_hl.s3 ; hl = q = q >> 3     mov  b,h     mov  c,l       ; bc = q     dad  h     dad  h     dad  b     dad  h         ; hl = q*10     mov  a,e     sub  l     mov  e,a       ; e = r     mvi  d,0     adi  6     rar     rar     rar     rar     ani  15        ; a = (r+6)>>4     add  c     mov  l,a     mov  h,b     rnc     inr  h         ret ;----------------------------------------------------------------------- .dummy = shr_hl  ;----------------------------------------------------------------------- endp     ;======================================================================= ; ;======================================================================= ;   A MUST BE 0 ! ;----------------------------------------------------------------------- proc shr_hl ;----------------------------------------------------------------------- .s1:dad  h     ral .s2:dad  h     ral .s3:dad  h     ral .s4:dad  h     ral .s5:dad  h     ral .s6:dad  h     ral .s7:dad  h     ral     mov  l,h     mov  h,a         ret ;----------------------------------------------------------------------- endp ;=======================================================================

a multibyte mathematic is tested - you may check it with attached project. new library and latest fasmg required to compile!

shoorick wrote:

Here is the new support for i8080/85 CPUs

This is cool.

I'm curious about one macro detail you used.
I see irp used

Code:

irp <mnem,opcode>,XCHG?,0EBh,PCHL?,0E9h,XTHL?,0E3h,SPHL?,0F9h,\                   RLC?, 007h,RRC?, 00Fh,RAL?, 017h,RAR?, 01Fh,\                   DAA?, 027h,CMA?, 02Fh,STC?, 037h,CMC?, 03Fh,\                   NOP?, 000h,RET?, 0C9h,RIM?, 020h,SIM?, 030h,\                   HLT?, 076h,EI?,  0FBh,DI?,  0F3h     macro mnem          db opcode     end macro end irp

That gives quite compact macros, but is it slower/==/faster? than creating a macro-per-opcode ?

Seems the irp has to loop to build the macros, but it does save file-lines-read, and this does run once, compared to many more opcodes in user source files.

jmg wrote:

... but is it slower/==/faster? than creating a macro-per-opcode ?

You can test that for yourself with your computer. Let us know the results.

revolution wrote:

You can test that for yourself with your computer. Let us know the results.

OK, yes that is one 'answer'....
Perhaps a better answer, will come from someone who may have done this already, which is what I was asking ?

it is slower, sure, maybe, for few µs

A while I do not see any delay with assembling. I can not fit a program more than 32kB into the such model of computer, but even if it were some seconds for assembling, it would not be bothering me

Code:

C:\spec\fasmg\fasmg.exe DEMO.asm DEMO.rks flat assembler g  version 0.97.1471502275 4 passes, 0.3 seconds, 3066 bytes.