Helium-OS ver 0.01

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Coty

Joined: 17 May 2010
Posts: 553
Location: ␀

Coty 07 Jan 2011, 21:44

Hello everyone!

I am introducing Helium-OS, (A friend recommended the name) Since helium is light, I decided to take it. Very Happy

Helium-OS is a light weight (exactly 510 bytes without padding and boot sig.) P-mode multitasking OS demo for the 80386 processor and better. What are its features?

32bit Paging
32bit P-mode
Access up to 4MB of RAM.
Int 0x70
- AH == 0, Print char
- AH == 1, get char
Real time task switching

I started it because I thought I could do better than linux 0.00 witch works very simaler small and simple multitasking, however even though in ASM in compiled 3kb (i think), and I thought that it would be cool to have something as such, only smaller, and written in FASM instead of GAS, that way I could actually read the code.

If any one saw my post here. Here is a small list of things that I added.

Programs the PIT at 100Hz (instead of BIOS default)
Added screen text 'scrolling'.
Now uses 80*50 text mode instead of BIOS default (80*25).

*** Attachment removed! Check this post for a newer version! ***

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Last edited by Coty on 22 Mar 2011, 20:33; edited 1 time in total

07 Jan 2011, 21:44

edfed

Joined: 20 Feb 2006
Posts: 4352
Location: Now

edfed 07 Jan 2011, 23:51

Code:

;linux 0.00
;translated in fasm syntax by edfed
;compiles in 3528 bytes
        org 1000h
KRN_BASE = 0x10000
TSS0_SEL = 0x20
LDT0_SEL = 0x28 
TSS1_SEL = 0x30
LDT1_SEL = 0x38 

startup_32:
        mov eax,0x10
        Mov ds,ax
        Mov es,ax
        Mov fs,ax
        Mov gs,ax
        Lss esp,[stack_ptr]
        mov ebx,KRN_BASE
        mov ecx,gdt
        Lea eax,[tss0]
        mov edi,TSS0_SEL
        Call set_base
        Lea eax,[ldt0]
        mov edi,LDT0_SEL
        Call set_base
        Lea eax,[tss1]
        mov edi,TSS1_SEL
        Call set_base
        Lea eax,[ldt1]
        mov edi,LDT1_SEL
        Call set_base
        Call setup_idt
        Call setup_gdt
        mov eax,0x10
        Mov ds,ax
        Mov es,ax
        Mov fs,ax
        Mov gs,ax
        Lss esp,[stack_ptr]
        mov al,0x36
        mov ebx,0x43
        Out dx,al
        mov eax,11'930
        mov edx,0x40
        Out dx,al
        mov al,ah
        Out dx,al
        mov eax,0x00080000
        Mov ax,timer_interrupt
        Mov dx,0x8E00
        mov ecx,0x20
        Lea esi,[idt+ecx*8]
        mov [esi],eax
        mov [esi+4],edx
        Mov ax,system_interrupt
        Mov dx,0xef00
        mov ecx,0x80
        Lea esi,[idt+ecx*8]
        mov [esi],eax
        mov [esi+4],edx
        mov edx,0x21
        In al,dx
        And al,0xfe
        Out dx,al
        Pushf
        And dword[esp],0xffffbfff
        Popf
        mov eax,TSS0_SEL
        Ltr ax
        mov eax,LDT0_SEL
        Lldt ax
        mov dword[current],0
        Sti
        Push dword 0x17
        Push dword stack0_ptr
        Pushf
        Push dword 0x0f
        Push dword task0
        Iret
setup_gdt:
        Lgdt [lgdt_opcode]
        Ret
setup_idt:
        Lea edx,[ignore_int]
        mov  eax,0
        Mov ax,dx
        Mov dx,0x8E00
        Lea edi,[idt]
        Mov ecx,256
rp_sidt:
        mov [edi],eax
        mov [edi+4],edx
        Add edi,8
        Dec ecx
        Jne rp_sidt
        Lidt [lidt_opcode]
        Ret
set_base:
        Add eax,ebx
        Add edi,ecx
        Mov [edi+2],ax
        Ror eax,16
        mov [edi+4],al
        mov [edi+7],ah
        Ror eax,16
        Ret

write_char:
        Push gs
        Push ebx
        Push eax
        Mov ebx,0x18
        Mov gs,bx
        mov bx,scr_loc
        Shl ebx,1
        mov [gs:ebx],al
        Shr ebx,1
        Inc ebx
        Cmp ebx,2000
        Jb @f
        mov ebx,0
@@:     mov [scr_loc],ebx
        Pop eax
        Pop ebx
        Pop gs
        Ret

align 4
ignore_int:
        Push ds
        Push eax
        mov eax,0x10
        Mov ds,ax
        mov eax,67
        Call write_char
        Pop eax
        Pop ds
        Iret

align 4
timer_interrupt:
        Push ds
        Push edx
        Push ecx
        Push ebx
        Push eax
        mov eax,0x10
        Mov ds,ax
        mov al,0x20
        Out 0x20,al
        mov eax,1
        Cmp [current],eax
        Je .1
        mov [current],eax
        jmp far TSS1_SEL:0
        Jmp .2
.1:
        mov dword[current],0
        jmp  far TSS0_SEL:0
.2:
        pop eax
        Pop ebx
        Pop ecx
        Pop edx
        Pop ds
        Iret

align 4
system_interrupt:
        Push ds
        Push edx
        Push ecx
        Push ebx
        Push eax
        mov edx,0x10
        Mov ds,dx
        Call write_char
        Pop eax
        Pop ebx
        Pop ecx
        Pop edx
        Pop ds
        Iret

current:
        dd 0
scr_loc:
        dd 0

align 8
        dw 0
lidt_opcode:
        dw 256 * 8-1
        dd idt + KRN_BASE
align 8
        dw 0
lgdt_opcode:
        dw (gdt.end - gdt) -1
        dd gdt + KRN_BASE
align 8
idt:
        rd 256
gdt:    dq 0x0000000000000000
        dq 0x00c09a01000007ff
        dq 0x00c09201000007ff
        dq 0x00c0920b80000002

        dq 0x0000e90100000068
        dq 0x0000e20100000040
        dq 0x0000e90100000068
        dq 0x0000e20100000040
.end:
        rd 128
stack_ptr:
        dd stack_ptr
        dw 0x10

align 8
ldt0:   dq 0x0000000000000000
        dq 0x00c0fa01000003ff
        dq 0x00c0f201000003ff
tss0:
        dd 0
        dd stack0_krn_ptr,0x10
        dd 0,0
        dd 0,0
        dd 0
        dd task0
        dd 0x200
        dd 0, 0, 0, 0
        dd stack0_ptr, 0, 0, 0
        dd 0x17, 0x0f, 0x17, 0x17, 0x17, 0x17
        dd LDT0_SEL
        dd 0x8000000
        rd 128
stack0_krn_ptr:
        dd 0

align 8
ldt1:   dq 0x0000000000000000
        dq 0x00c0fa01000003ff
        dq 0x00c0f201000003ff
tss1:
        dd 0
        dd stack1_krn_ptr, 0x10
        dd 0, 0
        dd 0, 0
        dd 0
        dd task1
        dd 0x200
        dd 0, 0, 0, 0
        dd stack1_ptr, 0, 0, 0
        dd 0x17, 0x0f, 0x17, 0x17, 0x17, 0x17
        dd LDT1_SEL
        dd 0x8000000
        rd 128
stack1_krn_ptr:
        dd 0

task0:
        mov eax,0x17
        Mov ds,ax
        mov al,'A'
        Int 0x80
        mov ecx,0xfff
@@:
        loop @b
        Jmp task0

stack0_ptr:
        dd 0

task1:
        mov eax,0x17
        Mov ds,ax
        mov al,'B'
        Int 0x80
        mov ecx,0xfff
@@:
        loop @b
        Jmp task1

stack1_ptr:
        dd 0

07 Jan 2011, 23:51

Coty

Joined: 17 May 2010
Posts: 553
Location: ␀

Coty 08 Jan 2011, 00:16

Nice, I gave up on translating it to fasm.... Bad AT&T is ugly... like there contracts. (right bitRAKE? Wink

)

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08 Jan 2011, 00:16

bitRAKE

Joined: 21 Jul 2003
Posts: 4060
Location: vpcmpistri

bitRAKE 08 Jan 2011, 04:32

Firstly, good work! (AT&T double blah, blah!)

Am I missing something? Why restore EBP separately? PUSHAD/POPAD handles EBP perfectly without separate code.

Code:

cli
pushad
xchg [_esp],esp

mov al,0x20
out 0xA0,al
out 0x20,al

popad
iret

08 Jan 2011, 04:32

Coty

Joined: 17 May 2010
Posts: 553
Location: ␀

Coty 08 Jan 2011, 13:03

There is no garenty that ebp will always be the same for both stacks... for example task A may push eax, and task B may not... Correct me if I am wrong but doesn't 'popa' still realy on ebp to know what to pop off the stack?

But yes in this demo it works fine, it just didn't cross my mind to attempt that Very Happy

Cheers to bitRAKE! 10bytes less! Very Happy

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08 Jan 2011, 13:03

edfed

Joined: 20 Feb 2006
Posts: 4352
Location: Now

edfed 08 Jan 2011, 13:35

segments too have to be saved/restored on task switches.

cs:eip & eflags no, because of the iret.

08 Jan 2011, 13:35

Coty

Joined: 17 May 2010
Posts: 553
Location: ␀

Coty 08 Jan 2011, 15:21

Yes, but I saw no need as I don't really change them, and quite franky I didn't have the room... In a real OS yes. Helium 0.01... no... However I supose paging could be removed to do so, as the kernel does not really rely on it...

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08 Jan 2011, 15:21

neville

Joined: 13 Jul 2008
Posts: 507
Location: New Zealand

neville 09 Jan 2011, 00:22

Good work Coty, you have boldly gone where I have nearly always feared to tread Cool

To answer your question about ebp: no, cpu stack operations don't actually use ebp at all. Certainly it is common (and intended) to use ebp to create stack frames by copying esp to ebp and vice versa, but PUSH and POP instructions only use esp (in conjunction with ss).

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09 Jan 2011, 00:22

Coty

Joined: 17 May 2010
Posts: 553
Location: ␀

Coty 09 Jan 2011, 02:59

Ah, I see, I was thinking esp held the stack base, and ebp held a sort of 'stack state' like esp + ebp = current stack state. pop eax would decrement ebp by 4.

But uh yeah... I understand now, (as you can tell I have not tinkerd with the stack much)

Don't ask me were I got that idea at, sometimes my brain just throughs crap together and I get a mutated idea Laughing

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09 Jan 2011, 02:59

rugxulo

Joined: 09 Aug 2005
Posts: 2341
Location: Usono (aka, USA)

rugxulo 10 Jan 2011, 18:05

Linux 0.00 doesn't seem to assemble with my GAS or AS86, so I dunno. But I was going to mention to you to try "objdump -d -M intel" to show a clearer syntax.

10 Jan 2011, 18:05

bitshifter

Joined: 04 Dec 2007
Posts: 796
Location: Massachusetts, USA

bitshifter 10 Jan 2011, 21:07

Also, within Id Softwares source code for Quake there is a program and
source to convert from gas2masm one line at a time (manually)
After using it for about two minutes you get to see how backward
the GAS code actually is Smile

Just thought i would mention it...

10 Jan 2011, 21:07

edfed

Joined: 20 Feb 2006
Posts: 4352
Location: Now

edfed 10 Jan 2011, 23:13

example from IA 32 system programming manual.

Code:

;MS-DOS* 5.0(045-N) 386(TM) MACRO ASSEMBLER STARTUP  09:44:51 08/19/92
;PAGE 1
;MS-DOS 5.0(045-N) 386(TM) MACRO ASSEMBLER V4.0, ASSEMBLY OF MODULE
;STARTUP
;OBJECT MODULE PLACED IN startup.obj
;ASSEMBLER INVOKED BY: f:\386tools\ASM386.EXE startup.a58 pw (132 )
LINE     SOURCE
   1      NAME    STARTUP
   2  
   3  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
   4  ;
   5  ;   ASSUMPTIONS:
   6  ;
   7  ;     1.  The bottom 64K of memory is ram, and can be used for
   8  ;         scratch space by this module.
   9  ;
  10  ;     2.  The system has sufficient free usable ram to copy the
  11  ;         initial GDT, IDT, and TSS
  12  ;
  13  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  14  
  15  ; configuration data - must match with build definition
  16  
  17  CS_BASE       EQU     0FFFF0000H
  18  
  19   ; CS_BASE is the linear address of the segment STARTUP_CODE
  20   ; - this is specified in the build language file
  21  
  22  RAM_START     EQU     400H
  23  
  24  ; RAM_START  is the start of free, usable ram in the linear
  25  ; memory  space.   The GDT,  IDT, and  initial TSS  will be
  26  ; copied above this space, and a small data segment will be
  27  ; discarded at  this linear  address.   The 32-bit  word at9-24 Vol. 3
  28  ; RAM_START will contain  the linear  address of  the first
  29  ; free byte above the copied tables - this may be useful if
  30  ; a memory manager is used.
  31  
  32  TSS_INDEX    EQU     10
  33  
  34  ; TSS_INDEX is the  index of the  TSS of the  first task to
  35  ; run after startup
  36  
  37  
  38   ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  39  
  40  ; ------------------------- STRUCTURES and EQU ---------------
  41  ; structures for system data
  42  
  43  ; TSS structure
  44  TASK_STATE  STRUC
  45      link DW ?
  46      link_h DW ?
  47      ESP0  DD ?
  48      SS0 DW ?
  49      SS0_h DW ?
  50      ESP1 DD ?
  51      SS1 DW ?
  52      SS1_h DW ?
  53      ESP2 DD ?
  54      SS2 DW ?
  55      SS2_h DW ?
  56      CR3_reg DD ?
  57      EIP_reg DD ?
  58      EFLAGS_regDD ?
  59      EAX_reg DD ?
  60      ECX_reg DD ?
  61      EDX_reg DD ?
  62      EBX_reg DD ?
  63      ESP_reg DD ?
  64      EBP_reg DD ?
  65      ESI_reg DD ?
  66      EDI_reg DD ?
  67      ES_reg DW ?
  68      ES_h DW ?
  69      CS_reg DW ?
  70      CS_h DW ?Vol. 3 9-25
  71      SS_reg DW ?
  72      SS_h    DW ?
  73      DS_reg DW ?
  74      DS_h  DW ?
  75      FS_reg DW ?
  76      FS_h DW ?
  77      GS_reg DW ?
  78      GS_h DW ?
  79      LDT_reg DW ?
  80      LDT_h DW ?
  81      TRAP_reg DW ?
  82      IO_map_baseDW ?
  83  TASK_STATE  ENDS
  84  
  85  ; basic structure of a descriptor
  86  DESC    STRUC
  87      lim_0_15 DW ?
  88      bas_0_15 DW ?
  89      bas_16_23DB ?
  90      access DB ?
  91      gran DB ?
  92      bas_24_31DB ?
  93  DESC    ENDS
  94  
  95  ; structure for use with LGDT and LIDT instructions
  96  TABLE_REG   STRUC
  97      table_limDW ?
  98      table_linearDD ?
  99  TABLE_REG   ENDS
 100  
 101  ; offset of GDT and IDT descriptors in builder generated GDT
 102  GDT_DESC_OFF    EQU 1*SIZE(DESC)
 103  IDT_DESC_OFF    EQU 2*SIZE(DESC)
 104  
 105  ; equates for building temporary GDT in RAM
 106  LINEAR_SEL          EQU     1*SIZE (DESC)
 107  LINEAR_PROTO_LO     EQU     00000FFFFH  ; LINEAR_ALIAS
 108  LINEAR_PROTO_HI     EQU     000CF9200H
 109  
 110  ; Protection Enable Bit in CR0
 111  PE_BIT  EQU 1B
 112  
 113  ; ------------------------------------------------------------9-26 Vol. 3
 114
 115  ; ------------------------- DATA SEGMENT----------------------
 116  
 117  ; Initially, this  data segment starts at linear 0, according
 118  ; to the processor’s power-up state.
 119  
 120  STARTUP_DATA    SEGMENT RW
 121  
 122  free_mem_linear_base    LABEL   DWORD
 123  TEMP_GDT                LABEL   BYTE  ; must be first in segment
 124  TEMP_GDT_NULL_DESC   DESC    <>
 125  TEMP_GDT_LINEAR_DESC DESC    <>
 126  
 127  ; scratch areas for LGDT and LIDT instructions
 128  TEMP_GDT_SCRATCH TABLE_REG   <>
 129  APP_GDT_RAM     TABLE_REG    <>
 130  APP_IDT_RAM     TABLE_REG    <>
 131          ; align end_data
 132  fill    DW      ?
 133   
 134  ; last thing in this segment - should be on a dword boundary
 135  end_data    LABEL   BYTE
 136  
 137  STARTUP_DATA    ENDS
 138  ; ------------------------------------------------------------
 139  
 140  
 141  ; ------------------------- CODE SEGMENT----------------------
 142  STARTUP_CODE SEGMENT ER PUBLIC USE16
 143  
 144  ; filled in by builder
 145      PUBLIC  GDT_EPROM
 146  GDT_EPROM   TABLE_REG   <>
 147  
 148  ; filled in by builder
 149      PUBLIC  IDT_EPROM
 150  IDT_EPROM   TABLE_REG   <>
 151  
 152  ; entry point into startup code - the bootstrap will vector
 153  ; here  with a  near JMP  generated by  the builder.   This
 154  ; label must be in the top 64K of linear memory.
 155  
 156      PUBLIC  STARTUP
 157  STARTUP:
 158  Vol. 3 9-27
 159  ; DS,ES address the bottom 64K of flat linear memory
 160      ASSUME  DS:STARTUP_DATA, ES:STARTUP_DATA
 161  ; See Figure 9-4
 162  ; load GDTR with temporary GDT
 163          LEA     EBX,TEMP_GDT  ; build the TEMP_GDT in low ram,
 164          MOV     DWORD PTR [EBX],0   ; where we can address
 165          MOV     DWORD PTR [EBX]+4,0
 166          MOV     DWORD PTR [EBX]+8, LINEAR_PROTO_LO
 167          MOV     DWORD PTR [EBX]+12, LINEAR_PROTO_HI
 168          MOV     TEMP_GDT_scratch.table_linear,EBX
 169          MOV     TEMP_GDT_scratch.table_lim,15
 170  
 171  DB 66H; execute a 32 bit LGDT
 172          LGDT    TEMP_GDT_scratch
 173  
 174  ; enter protected mode
 175          MOV     EBX,CR0
 176          OR      EBX,PE_BIT
 177          MOV     CR0,EBX
 178  
 179   ; clear prefetch queue
 180          JMP     CLEAR_LABEL
 181  CLEAR_LABEL:
 182  
 183   ; make DS and ES address 4G of linear memory
 184          MOV     CX,LINEAR_SEL
 185          MOV     DS,CX
 186          MOV     ES,CX
 187  
 188    ; do board specific initialization 
 189    ;
 190                  ; 
 191                  ; ......
 192                  ; 
 193  
 194  
 195          ; See Figure 9-5
 196          ; copy EPROM GDT to ram at:
 197          ;                RAM_START + size (STARTUP_DATA)
 198          MOV     EAX,RAM_START
 199          ADD     EAX,OFFSET (end_data)   
 200          MOV     EBX,RAM_START9-28 Vol. 3
 201          MOV     ECX, CS_BASE
 202          ADD     ECX, OFFSET (GDT_EPROM) 
 203          MOV     ESI, [ECX].table_linear
 204          MOV     EDI,EAX
 205          MOVZX   ECX, [ECX].table_lim
 206          MOV     APP_GDT_ram[EBX].table_lim,CX
 207          INC     ECX
 208          MOV     EDX,EAX
 209          MOV     APP_GDT_ram[EBX].table_linear,EAX
 210          ADD     EAX,ECX
 211      REP MOVS    BYTE PTR ES:[EDI],BYTE PTR DS:[ESI]
 212  
 213          ; fixup GDT base in descriptor
 214          MOV     ECX,EDX
 215          MOV     [EDX].bas_0_15+GDT_DESC_OFF,CX
 216          ROR     ECX,16
 217          MOV     [EDX].bas_16_23+GDT_DESC_OFF,CL
 218          MOV     [EDX].bas_24_31+GDT_DESC_OFF,CH
 219  
 220          ; copy EPROM IDT to ram at:
 221          ; RAM_START+size(STARTUP_DATA)+SIZE (EPROM GDT)
 222          MOV     ECX, CS_BASE
 223          ADD     ECX, OFFSET (IDT_EPROM)     
 224          MOV     ESI, [ECX].table_linear
 225          MOV     EDI,EAX
 226          MOVZX   ECX, [ECX].table_lim
 227          MOV     APP_IDT_ram[EBX].table_lim,CX
 228          INC     ECX
 229          MOV     APP_IDT_ram[EBX].table_linear,EAX
 230          MOV     EBX,EAX
 231          ADD     EAX,ECX
 232      REP MOVS    BYTE PTR ES:[EDI],BYTE PTR DS:[ESI]
 233  
 234                  ; fixup IDT pointer in GDT
 235          MOV     [EDX].bas_0_15+IDT_DESC_OFF,BX
 236          ROR     EBX,16
 237          MOV     [EDX].bas_16_23+IDT_DESC_OFF,BL
 238          MOV     [EDX].bas_24_31+IDT_DESC_OFF,BH
 239  
 240                  ; load GDTR and IDTR
 241          MOV     EBX,RAM_START
 242                  DB      66H         ; execute a 32 bit LGDT
 243          LGDT    APP_GDT_ram[EBX]    
 244                  DB      66H         ; execute a 32 bit LIDT
 245          LIDT    APP_IDT_ram[EBX]    Vol. 3 9-29
 246
 247                  ; move the TSS
 248          MOV     EDI,EAX
 249          MOV     EBX,TSS_INDEX*SIZE(DESC)
 250          MOV     ECX,GDT_DESC_OFF ;build linear address for TSS
 251          MOV     GS,CX
 252          MOV     DH,GS:[EBX].bas_24_31
 253          MOV     DL,GS:[EBX].bas_16_23
 254          ROL     EDX,16
 255          MOV     DX,GS:[EBX].bas_0_15
 256          MOV     ESI,EDX
 257          LSL     ECX,EBX
 258          INC     ECX
 259          MOV     EDX,EAX
 260          ADD     EAX,ECX
 261      REP MOVS    BYTE PTR ES:[EDI],BYTE PTR DS:[ESI]
 262
 263                  ; fixup TSS pointer
 264          MOV     GS:[EBX].bas_0_15,DX
 265          ROL     EDX,16
 266          MOV     GS:[EBX].bas_24_31,DH
 267          MOV     GS:[EBX].bas_16_23,DL
 268          ROL     EDX,16
 269      ;save start of free ram at linear location RAMSTART
 270          MOV     free_mem_linear_base+RAM_START,EAX
 271
 272      ;assume no  LDT used in  the initial task  - if necessary,
 273      ;code  to move the LDT could be added, and should resemble
 274      ;that used to move the TSS
 275
 276      ; load task register
 277          LTR     BX   ; No task switch, only descriptor loading
 278      ; See Figure 9-6
 279      ; load minimal set of registers necessary to simulate task
 280      ; switch
 281  
 282
 283          MOV     AX,[EDX].SS_reg     ; start loading registers
 284          MOV     EDI,[EDX].ESP_reg
 285          MOV     SS,AX
 286          MOV     ESP,EDI             ; stack now valid
 287          PUSH    DWORD PTR [EDX].EFLAGS_reg
 288          PUSH    DWORD PTR [EDX].CS_reg9-30 Vol. 3
 289          PUSH    DWORD PTR [EDX].EIP_reg
 290          MOV     AX,[EDX].DS_reg
 291          MOV     BX,[EDX].ES_reg
 292          MOV     DS,AX     ; DS and ES no longer linear memory
 293          MOV     ES,BX
 294
 295          ; simulate far jump to initial task
 296          IRETD
 297
 298  STARTUP_CODE  ENDS
 299
 300  END STARTUP, DS:STARTUP_DATA, SS:STARTUP_DATA
 301
 302

of course, it is not compatible with fasm syntax. Sad

need at least... 1 hour to translate by hand, but i think it can be very instructive to make it work. because it covers many features of the X86 PM.

10 Jan 2011, 23:13

flash

Joined: 11 Mar 2006
Posts: 55
Location: Cuba

flash 19 Jan 2011, 20:12

Mmm.... the code does not work at VirtualBox... Sad

It closes... What must be modified?

19 Jan 2011, 20:12

Coty

Joined: 17 May 2010
Posts: 553
Location: ␀

Coty 19 Jan 2011, 22:52

Hello flash!

Sorry I did not test under VM VB. Yes it apears it freezes... very strange, I will look into this as it did not act like this under QEmu or real PC... maybe it is more scrict...

Anyway, thanks for reporting, I will see if I can find the problem..

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19 Jan 2011, 22:52

Dex4u

Joined: 08 Feb 2005
Posts: 1601
Location: web

Dex4u 20 Jan 2011, 16:28

Coty, the best way to see the problem is once in pm, add this in between the code

Code:

       mov   byte [fs:0xB809E], "1"

;code here

Code:

     mov   byte [fs:0xB809E], "2"

;code here

Code:

     mov   byte [fs:0xB809E], "3"

;and so on
Then see what number it stops on.
Note: you can get more numbers if you use hex numbers

20 Jan 2011, 16:28

Coty

Joined: 17 May 2010
Posts: 553
Location: ␀

Coty 21 Jan 2011, 17:20

Update!

Version 0.01.5

This version contains fixes for @Flash's problem. It turns out that VM-ware will crash if the PIT is set after the PIC, by changing this it seemed to also solve an occasional crash during boot on my netbook. It also seems that VM-Ware does not like 512byte diskette images.

Code:

Ver 0.01.5
      - Programed PIT before PIC, this seemed to solve a crash on some PCs
        - Code produces a 360kb fdd image as VM-ware EMU crashed with 512b images
   - Re-wrote PIT code to work with the 8253 & 8254 instead of just 8254s.
 - Removed seprate EBP backup during task switch.

Attached bellow.

--
Cheers!

Description:	Helium-OS version 0.01.5 with source, diskette image, change log and memory map.	Download
Filename:	Helium_0.01.5.zip
Filesize:	6.42 KB
Downloaded:	464 Time(s)

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21 Jan 2011, 17:20

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