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flat assembler > Programming Language Design > [fasmg.x86] the long road ahead

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Mike Gonta



Joined: 26 Dec 2010
Posts: 202

[fasmg.x86] the long road ahead

As a proof of concept I've added (the relatively easy) x86 nop instruction to the fasmg core so that it assembles
that instruction's opcode (0x90).
I added this line to tables.inc symbols:

Code:
  db 3,'nop',SYMCLASS_INSTRUCTION,VALTYPE_NATIVE_COMMAND,VAL_INTERNAL,1
  dd x86_nop

which is the same as the 'db' (define_data) entry with a x86_nop handler:

Code:
x86_nop:
  pusha
  mov ecx1
  call initialize_output
  mov byte [edi], 0x90
  popa
  jmp instruction_assembled


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Mike Gonta
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Last edited by Mike Gonta on 29 Apr 2017, 22:10; edited 2 times in total
Post 29 Apr 2017, 13:29
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revolution
When all else fails, read the source


Joined: 24 Aug 2004
Posts: 15324
Location: Bigweld Industries

But x86 nop is more than just "db 0x90", it can also have arguments to give longer no-ops. Plus it is processor specific. Other CPUs can also use the nop opcode but have entirely different binary outputs.
Post 29 Apr 2017, 13:32
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Mike Gonta



Joined: 26 Dec 2010
Posts: 202


revolution wrote:
But x86 nop is more than just "db 0x90", it can also have arguments to give longer no-ops. Plus it is processor
specific. Other CPUs can also use the nop opcode but have entirely different binary outputs.

Of course, but this would be for an x86 specific fasmg version which would use an api that Tomasz hinted at here.

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Mike Gonta
look and see - many look but few see

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Post 29 Apr 2017, 14:11
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 6685
Location: Kraków, Poland

You do not need to preserve all the registers, in fact the only register that matters when jumping to "instruction_assembled" is ESI.
You may find some info about the instruction handler interface in DIRECTIVES.INC around line 290.
Post 29 Apr 2017, 14:20
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Mike Gonta



Joined: 26 Dec 2010
Posts: 202


Tomasz Grysztar wrote:
You do not need to preserve all the registers, in fact the only register that matters when jumping to "instruction_assembled" is ESI.
You may find some info about the instruction handler interface in DIRECTIVES.INC around line 290.

Thank you.
I'll start digging for the rest of the api.

http://mikegonta.com/fasmg.x86

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Mike Gonta
look and see - many look but few see

http://mikegonta.com
Post 29 Apr 2017, 15:01
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 6685
Location: Kraków, Poland

I think it is worth noting why have I not started working on native implementation x86 instruction set myself. I was a bit overwhelmed by my own ideas. I knew that to include everything I wanted I would have to put so much work into it that I'm not even sure if it could pay off. And fasmg by itself is enough to keep me busy for a long time, while I find writing macros for it very satisfying.

What I had in mind for "fasm 2" instruction encoder (I only shared it with revolution back then, but we did not discuss this much) was to include many switchable settings. In case of fasm 1 there is just a few settings for the instruction encoder - USE16, USE32 and USE64, and recently added USEAVX256 and USEAVX512. For a new encoder I wanted to have many more, including choice of supported CPU lines / instruction sets, but also including options of encoding instructions differently, like enforcing long immediates, or choosing to use a different "assembler fingerprint".

In this vision the options could be set globally (like USE32 does) or just for a single instruction by adding a "decorator" to the line. For example, there could be settings called "rmdst" and "rmsrc" to select whether the instruction with "reg,reg" operands should be encoded using the "r/m,reg" opcode, or the "reg,r/m" one. It would be possible to select this option globally with line like:

Code:
use rmdst

but also it would be possible to select it just for a single instruction:

Code:
xor eax,ebx {rmsrc}



Similarly an instruction set could be selected for the whole source, but then a single instruction from an other instruction set could be assembled using the local setting:

Code:
use i286
bsr ax,bx {i386}

Some other examples of what I had in mind:

Code:
add eax,0 {imm32; like "add eax,dword 0" in fasm 1
loadall {i286; like loadall286 in fasm 1


These are just to give an general idea of what my plans for fasm 2 were, the actual implementation could end up different. At the time when I first envisioned these ideas braces were not used in any of the Intel assembly syntax. This changed with AVX-512 and perhaps if I was to implement these ideas nowadays, I would reconsider the syntactic choice. But I do not really see myself starting such project anytime soon. Or perhaps I would start working on a set of macros for fasmg that would have it all.
Post 02 May 2017, 22:00
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 6685
Location: Kraków, Poland

I have started working on a prototype macros of an "advanced x86 encoder". I took my existing x64 macros for fasmg as a base and I'm adapting them to the "use" engine I created. The processor and mode selection may look like:

Code:
use i386
use32 ; or: use 32

But multiple options may be specified in a single line, so the above can be shortened to:

Code:
use i38632

So far I have converted only a few of the instructions macros, so there are no options for additional instruction sets and even the basic ones are only partially done. But some of the options can be already tested, like the "rmdst" and "rmsrc" I mentioned earlier. For the decorators altering options in a single line I chose the {* *}
syntax (it can be easily altered in the "parse_operands" macro):

Code:
use i38632 

xor eax,ebx {*rmdst*}   ; 31 D8
xor eax,ebx {*rmsrc*}   ; 33 C3

add ecx,1 {*imm8*}      ; 83 C1 01
add ecx,1 {*imm32*}     ; 81 C1 01 00 00 00

use AMD6464

mov rax,1000 {*imm32*}  ; 48 C7 C0 E8 03 00 00
mov rax,1000 {*imm64*}  ; 48 B8 E8 03 00 00 00 00 00 00

The same settings that can be set with USE can also be specified in decorators, and vice versa, the difference is that decorator only alters settings for a single line while USE switches it semi-permanently (until it is changed again by another USE command):

Code:
use i186

mov eax,ebx {*i386*}
mov eax,ebx ; error



Description: Advanced x86 encoder in form of fasmg macros - early prototype
Download
Filename: x86-2.inc
Filesize: 98.24 KB
Downloaded: 64 Time(s)



Last edited by Tomasz Grysztar on 31 Jul 2017, 08:39; edited 1 time in total
Post 20 Jul 2017, 20:06
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Tomasz Grysztar
Assembly Artist


Joined: 16 Jun 2003
Posts: 6685
Location: Kraków, Poland

I have updated the file above with a more or less complete basic instruction set. Any instruction set extensions like SSE are still missing, though.
Post 30 Jul 2017, 20:50
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VEG



Joined: 06 Feb 2013
Posts: 70
Location: Minsk, Belarus

Interesting. Maybe this set of macros deserves a separate topic, starting from this post: https://board.flatassembler.net/topic.php?p=196169#196169
Post 31 Jul 2017, 11:23
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