; P8X32_PropMacros.asm ;include 'hex.inc' ; comment to create Binary image - change MAKE.CMD if inactive. 1 pass, 9.6 seconds, 46482 bytes. wow...7910 lines in LST? ;include 'listing.inc' ; Include this to enable .LST generate - newer, gives 2 passes, 27.4 seconds, 46482 bytes. ;include 'listing_o2.inc' ; Include this to enable .LST generate - older gives 1 pass, 1.1 seconds, 16520 bytes. ; Listing ON -> 2 passes, 2.4 seconds, 16547 bytes, 266k LST ; Listing OFF -> 2 passes, 0.4 seconds, 16547 bytes, 80 byte LST ;0.99 ; Listing ON -> 2 passes, 2.4 seconds, 16547 bytes. 266k LST ; Listing OFF -> 2 passes, 0.4 seconds, 16547 bytes. 80 byte LST ; Clean-up, removed outer test code, placed macros first, and 8051 macro inc, and now P1 only - much faster, maybe due to 1 pass now ? ; 1 pass, 1.4 seconds, 16464 bytes. 251k LST file ; ; more edits ; 1 pass, 1.2 seconds, 16464 bytes. 12k source 251k LST file ; 1 pass, 1.2 seconds, 16464 bytes. 30k source (+18k comments to check file read speed ) ; 1 pass, 0.2 seconds, 16464 bytes. LST off, still ~ 6x slower on. ; 1 pass, 0.2 seconds, 16520 bytes. ; new listMacro, table based, 1 pass, 1.1 seconds, 16520 bytes. ; The Z and C bits of the ZCRI field are clear (0) by default and are set (1) if the instruction was specified with a WZ and/or WC effect. ; If the WZ effect is specified, the Z flag is set (1) if SValue is zero. ; If the WC effect is specified, the C flag is set (1) if SValue is negative, or cleared (0) if SValue is positive. ; The R bit’s default state depends on the type of instruction, but is also affected if the instruction was specified with the WR or NR effect. ; The result is written to AValue unless the NR effect is specified. ; The I field’s default state depends on the type of instruction and is affected by the inclusion, or lack of, the literal indicator (#) ; in the instruction’s source field. ; Web: In this case you could just do it like this: ; All arguments are normally optional (may have empty value), * marks the required arguments, and the third one has the default value. ;macro pcADD? ParD*,ParS*,ParC:1111b ; ;dd (100000_0010b shl 22)+(ParC shl 18)+(ParD and 0x1ff) shl 9 + ParS and 0x1ff ;end macro ; ~~~~~~~~~~~~~~ Below goes into P8X32.INC eventually ~~~~~~~~~~~~~ ; ~~~~~~~~~~~~~~ Now Expanded to support Suffix too.. ~~~~~~~~~~~~~~~~~ ; ~~~~~~~~~ Build 32 IF_ variants ~~~~~~~~~~~~ iterate ,\ ALWAYS,1111b,NEVER,0000b,E,1010b,NE,0101b,A,0001b,B,1100b,AE,0011b,BE,1110b,C,1100b,NC,0011b,\ Z,1010b,NZ,0101b,C_EQ_Z,1001b,C_NE_Z,0110b,C_AND_Z,1000b,C_AND_NZ,0100b,NC_AND_Z,0010b,NC_AND_NZ,0001b,\ C_OR_Z,1110b,C_OR_NZ,1101b,NC_OR_Z,1011b,NC_OR_NZ,0111b,Z_EQ_C,1001b,Z_NE_C,0110b,Z_AND_C,1000b,\ Z_AND_NC,0010b,NZ_AND_C,0100b,NZ_AND_NC,0001b,Z_OR_C,1110b,Z_OR_NC,1011b,NZ_OR_C,1101b,NZ_OR_NC,0111b macro IF_#Cond? instruction& ParC = wxyz ; apply CC value, now global instruction end macro end iterate ;web suggestion define NR SUFF -001b define WC SUFF 010b define WZ SUFF 100b define SUFF gParC = 1111b ; default, globalV init macro F_ZCDS? ParD*,S_Suffix*& ; & for ParS and any suffix controls, writes to global gZCDS gZCR = 001b ; default, no Suffix case match S =SUFF suffix, S_Suffix ;splits S, ParS = S ; local flags iterate flag,suffix ; comma delimited list eg WZ, WC, NR if flag >= 0 gZCR = gZCR or flag else ;NR gZCR = gZCR and not -flag end if end iterate else ParS = S_Suffix end match gZCDS = (gZCR shl 23) + gParC shl 18 + (ParD and 0x1ff) shl 9 + ParS and 0x1ff gParC = 1111b ; restore global default, after use. IF_C(etc) updates this end macro ;F_ZCDS? ; ~~~~~~~~~~~~~ for now, just a few of P8X32A Opcodes, simpler forms. ~~~~~~~~~~~~~~~~~~~~~~~~~~ ; 109876 5432 1098 765432109 ; ADD 100000 001i cccc ddddddddd sssssssss macro ADD? ParD*,ParS*& ; ParC now global, ZCR via any suffix F_ZCDS ParD,ParS match #data, ParS dd (100000_0011b shl 22) + gZCDS else dd (100000_0010b shl 22) + gZCDS end match end macro ; SUB 100001 001i cccc ddddddddd sssssssss macro SUB? ParD*,ParS*& ; ParC now global, ZCR via any suffix F_ZCDS ParD,ParS match #data, ParS dd (100001_0011b shl 22) + gZCDS else dd (100001_0010b shl 22) + gZCDS end match end macro ; ZCRi ;XOR 011011 001i cccc ddddddddd sssssssss ; 109876 5432 1098 765432109 876543210 macro XOR? ParD*,ParS*& ; ParC now global, ZCR via any suffix F_ZCDS ParD,ParS match #data, ParS dd (011011_000_1b shl 22) + gZCDS else dd (011011_000_0b shl 22) + gZCDS end match end macro ; ~~~~~~~~~~~~~~ Above goes into P8X32.INC eventually ~~~~~~~~~~~~~ ; ; Try some P2 opcodes ; P2 DOCs have a blinky for loader testing ; $000..$1EF RAM ; $1F0 RAM / IJMP3 interrupt call address for INT3 ; $1F1 RAM / IRET3 interrupt return address for INT3 ; $1F2 RAM / IJMP2 interrupt call address for INT2 ; $1F3 RAM / IRET2 interrupt return address for INT2 ; $1F4 RAM / IJMP1 interrupt call address for INT1 ; $1F5 RAM / IRET1 interrupt return address for INT1 ; $1F6 RAM / PA receives CALLD-immediate return or LOC address ; $1F7 RAM / PB receives CALLD-immediate return or LOC address ; $1F8 PTRA pointer A to hub RAM ; $1F9 PTRB pointer B to hub RAM ; $1FA DIRA output enables for P0..P31 ; $1FB DIRB output enables for P32..P63 ; $1FC OUTA output states for P0..P31 ; $1FD OUTB output states for P32..P63 ; $1FE INA * input states for P0..P31 ; $1FF INB ** input states for P32..P63 DIRB EQU $1FB ;output enables for P32..P63 OUTA EQU $1FC ;output states for P0..P31 OUTB EQU $1FD ;output states for P32..P63 ; http://forums.parallax.com/discussion/164665/instruction-operation-p2-v10a ;---------------------------------------------------------------------------------------------------------------------------------------- ; COG REGISTERS ;------------------------------------------------- _IJMP3 = $1F0 ; '' COG Interrupt Jump 3 _IRET3 = $1F1 ; '' COG Interrupt Return 3 _IJMP2 = $1F2 ; '' COG Interrupt Jump 2 _IRET2 = $1F3 ; '' COG Interrupt Return 2 _IJMP1 = $1F4 ; '' COG Interrupt Jump 1 _IRET1 = $1F5 ; '' COG Interrupt Return 1 _ADDRA = $1F6 ; '' COG ADDR A _ADDRB = $1F7 ; '' COG ADDR B _PTRA = $1F8 ; '' COG PTR A _PTRB = $1F9 ; '' COG PTR B _DIRA = $1FA ; '' COG DIR A _DIRB = $1FB ; '' COG DIR B _OUTA = $1FC ; '' COG OUT A _OUTB = $1FD ; '' COG OUT B _INA = $1FE ; '' COG IN A / Debug JMP _INB = $1FF ; '' COG IN B / Debug RET ; ------------------------------------------------- ; 1098 7654321 09 8 00 01 10 11 ? ; CCCC 01100ff CZ I DDDDDDDDD SSSSSSSSS MOV NOT ABS NEG D,S/# CZ CZ CZ CZ ; CCCC 1101011 00 L DDDDDDDDD 0001010ff WAITX SETCZ PUSH POP D/#;D/#;D/#;D -- CZ -- CZ ; CCCC 1101011 CZ 0 DDDDDDDDD 0001011ff JMP CALL CALLA CALLB D CZ CZ CZ CZ ; CCCC 11011ff Rn n nnnnnnnnn nnnnnnnnn JMP CALL CALLA CALLB #abs/#rel -- -- -- -- ; Above have - hmm seems reversed from P1 ? ;define WC SUFF 010b ;define WZ SUFF 100b define WC2 SUFF 10b define WZ2 SUFF 01b macro F2_ZC_DS? ParD*,S_Suffix*& ; P2 version gZC = 00b ; default, no Suffix case match S =SUFF suffix, S_Suffix ;splits S, ParS = S ; local flags iterate flag,suffix ; comma delimited list eg WZ, WC, NR ( NR not in P2 ?) gZC = gZC or flag end iterate else ParS = S_Suffix end match gZCDS = gParC shl 28 + (gZC shl 19) + (ParD and 0x1ff) shl 9 + ParS and 0x1ff gParC = 1111b ; restore global default, after use IF_C(etc) updates this end macro ;F2_ZC_DS? macro F2_ZC_S? S_Suffix*& ; P2 version gZC = 00b ; default, no Suffix case match S =SUFF suffix, S_Suffix ;splits S, ParS = S ; local flags iterate flag,suffix ; comma delimited list eg WZ, WC, NR ( NR not in P2 ?) gZC = gZC or flag end iterate else ParS = S_Suffix end match gZCS = (gParC shl 28) + (gZC shl 19) gParC = 1111b ; restore global default, after use IF_C(etc) updates this end macro ;F2_ZC_S? ; 1098 7654321 09 8 ;; CCCC 1101011 CZ 0 DDDDDDDDD 000101100 JMP ;; CCCC 11011ff Rn n nnnnnnnnn nnnnnnnnn JMP macro JMP? ParS*& ; F2_ZC_S ParS ; match @data, ParS ; or test for register ? maybe use JMP @Rn ; dd gZCS + (1101011b shl 21) + 000101100b ; JMP @dddd ; else dd gZCS + (1101100_1b shl 20) + (ParS-($+4)) and 0xfffff ; relative ? ; end match end macro ; 1098 7654321 09 8 765432109 ; CCCC 1101011 00 L DDDDDDDDD 0001010ff WAITX L = 0 Register L = 1 Immediate macro WAITX? ParS*& ; F2_ZC_S ParS pV = ParS ; force numeric eval match #data, ParS if pV > 0x1ff dd (pV shr 9) + 0xff800000 ; upper bits to 1's , for AUGS dd gZCS + (1101011_00_1b shl 18) + (pV and 0x1ff) shl 9 + 000101000b else dd gZCS + (1101011_00_1b shl 18) + (pV and 0x1ff) shl 9 + 000101000b end if else dd gZCS + (1101011_00_0b shl 18) + (pV and 0x1ff) shl 9 + 000101000b end match end macro ;00 80 96 98 dd ((ParS and 0x1ff) shl 9) Incorrect ;00 80 02 00 dd (((ParS) and 0x1ff) shl 9) Correct ; 1098 7654321 09 8 ; CCCC 01100ff CZ I DDDDDDDDD SSSSSSSSS macro NOT? ParS*& ; NOT is single operand ? F2_ZC_S ParS match #data, ParS dd gZCS + (0110001_00_1b shl 18) + (ParS and 0x1ff) shl 9 + (ParS and 0x1ff) ; wants doubled param ? else dd gZCS + (0110001_00_0b shl 18) + (ParS and 0x1ff) shl 9 + (ParS and 0x1ff) end match end macro ;NOT D, S/# {wc,wz} NOT ;CCCC 0110001 CZ I DDDDDDDDDSSSSSSSSS ;Invert the bits in S to D ; List is LSB first 44 33 22 11 dd 0x11223344 ; not dirb FB F7 23 F6 ; not outb FD FB 23 F6 ; DIRB=$1FB ;output enables for P32..P63 ; OUTB=$1FD ;output states for P32..P63 ; 0x1FB+(0x1FB<<9) = 0x0003F7FB ORG 0 ; dd 20_000_000/4 ; waitx param ; From P2 DOCS :: ;To demonstrate hex loading, consider this small program: ; ;DAT ORG ; not dirb ‘all outputs ;.lp not outb ‘toggle states (blinks leds on Prop123 boards) ; waitx ##20_000_000/4 ‘wait ¼ second ; jmp #.lp ‘loop ;It assembles to: ; 00000- FB F7 23 F6 FD FB 23 F6 25 26 80 FF 28 80 66 FD F0 FF 9F FD ; NOT dirb NOT DIRB lp: NOT _OUTB WAITX #20_000_000/4 jmp lp ; loop R5 EQU 5 WAITX #510 WAITX R5 WAITX #$123 ; waitx $123 would generate bytes 28 46 62 FD WAITX $123 ; waitx $123 would generate bytes 28 46 62 FD ;00000000: FB F7 23 F6 NOT DIRB OK ;00000004: lp: ;00000004: FD FB 23 F6 NOT OUTB OK ;00000008: 25 26 80 FF 28 80 66 FD WAITX 20_000_000/4 OK ;00000010: F0 FF 9F FD jmp lp - need F0 FF 9F FD fix with +4 ;00000014: 28 FC 67 FD WAITX #510 ;00000018: 28 0A 60 FD WAITX R5 ;0000001C: 28 46 66 FD WAITX #$123 ;00000020: 28 46 62 FD WAITX $123 $123 would generate bytes 28 46 62 FD OK ;want 0xfd9ffff0, instead have 0xfd90002c dd 0x11223344 ;44 33 22 11 dd 0x11223344 LSB first ;00000008: 40 4B 4C 00 dd 20_000_000/4 ;0000000C: BF B4 B3 FF dd (0xffffffff)-20_000_000/4 ;P2_CodeBaseCHK: Blinky Binary file, in DB form. ; DB 0xFB,0xF7,0x23,0xF6,0xFD,0xFB,0x23,0xF6,0x25,0x26,0x80,0xFF,0x28,0x80,0x66,0xFD,0xF0,0xFF,0x9F,0xFD ;Packed 6 test ; 40 4B 4C 00 dd 20_000_000/4 ; BF B4 B3 FF dd (0xffffffff)-20_000_000/4 ; ~~~~~~~~~ Test coverage ~~~~~~~~~~~~ ; dd 20_000_000/4 ; fasmg never exits dd 20_000_000/4 ; waitx param dd (20_000_000/4) AND 0x1ff ; waitx param dd ((20_000_000/4) AND 0x1ff) shl 9 ; waitx param dd (0xffffffff)-20_000_000/4 ; waitx param ; ~~~~~~~~~~~~ General Simple ASM syntax checks ~~~~~~~~~~~~~~~~~~~ FirstEQU EQU 0x55 DB FirstEQU DB "Simple String" DB 33 ; TAsmC51 FASMG DD 3.141592653589793238462643 ;40 49 0F DB Reverse Byte Order - Endian issue ? DQ 3.141592653589793238462643 ;40 09 21 FB 54 44 2D 18 Reverse Byte Order - Endian issue ? DB 11 ccDef EQU 1111b shl 18 dd ccDef cCode EQU ccDef ; init as default cc dd (1000000010b shl 22) dd (10000000_10b shl 22) dd (1111_1010_0101_0111_0110_0101_0100_0011b) ; dd (1_1111_1010_0101_0111_0110_0101_0100_0011b) ; flags dq (1110_1111_1010_0101_0111_0110_0101_0100_0011_0010_0001b) ; ~~~~~~~~~ Prop Prefix and Suffix Opcode tests ~~~~~~~~~~ IF_Z XOR 0AH,#05H WC ;C field set 011 IF_Z XOR 0AH,#05H WZ ;Z field set 101 IF_Z XOR 0AH,#05H WZ,WC ;ZC field set 111 IF_Z XOR 0AH,#05H WC, WZ ;ZC field set 111 IF_Z XOR 0AH,#05H NR ;R field clr 000 XOR 0AH,#05H XOR 0AH,#05H WC ; Fixed with push iterate flag,suffix into G_CDS? IF_ALWAYS XOR 0AH,#05H IF_ALWAYS XOR 0AH,#05H WZ IF_ALWAYS XOR 0AH,#05H WZ, WC IF_ALWAYS XOR 0AH,#05H WZ, WC, NR ; field checks dd (001b shl 23) ; default dd (101b shl 23) ; wz dd (111b shl 23) ; wz wc dd (000b shl 23) ; nr TestSimpler = 1 if TestSimpler = 1 ;Times : - fixed with ParC:1111b Full 8 COG -> 2 passes, 2.2 seconds, 16487 bytes. ; New ZCR test qXOR -> 2 passes, 2.2 seconds, 16543 bytes, no suffix ; qXOR 07H,03H WZ,WC,NR -> 2 passes, 2.4 seconds, 16547 bytes. ; qXOR 07H,03H -> 2 passes, 2.2 seconds, 16547 bytes. ; qIF_Z qXOR 07H,03H -> 2 passes, 2.3 seconds, 16547 bytes. ; qIF_Z qXOR 07H,03H WZ,WC,NR -> 2 passes, 2.4 seconds, 16547 bytes. ; pcADD 07H,03H ; Comment ; qXOR 07H,03H ; Comment rept 511*8 IF_Z XOR 07H,03H WZ,WC,NR end rept ; qXOR 07H,03H WZ,WC,NR ; Comment else ; Times: ; Full 32 IF_ -> 2 passes, 2.2 seconds, 16455 bytes. ; Added '#' -> 2 passes, 2.2 seconds, 16455 bytes. LoopC = (512/15) ; 15 lines - fill all 8 COGs to allow speed tests rept LoopC*8 IF_E pcADD 0AH,05H ;Comment IF_NE pcADD 0AH,#05H ;Comment IF_A pcADD 0AH,05H ;Comment IF_B pcADD 0AH,05H ;Comment pcADD 07H,03H ;Comment IF_E pcSUB 0AH,05H ;Comment IF_NE pcSUB 0AH,#05H ;Comment IF_A pcSUB 0AH,05H ;Comment IF_B pcSUB 0AH,05H ;Comment pcSUB 07H,03H ;Comment IF_E pcADD 0AH,#05H IF_NE pcADD 0AH,05H IF_A pcADD 0AH,#05H IF_B pcADD 0AH,#05H pcADD 07H,#03H end rept end if ; IF_ALWAYS always 1111 ; IF_NEVER never 0000 ; IF_E if equal (Z = 1) 1010 IF_Z ; IF_NE if not equal (Z = 0) 0101 IF_NZ ; IF_A if above (!C & !Z = 1) 0001 IF_NC_AND_NZ –and– IF_NZ_AND_NC ; IF_B if below (C = 1) 1100 IF_C ; IF_AE if above or equal (C = 0) 0011 IF_NC ; IF_BE if below or equal (C | Z = 1) 1110 IF_C_OR_Z –and– IF_Z_OR_C ; IF_C if C set 1100 IF_B ; IF_NC if C clear 0011 IF_AE ; IF_Z if Z set 1010 IF_E ; IF_NZ if Z clear 0101 IF_NE ; IF_C_EQ_Z if C equal to Z 1001 IF_Z_EQ_C ; IF_C_NE_Z if C not equal to Z 0110 IF_Z_NE_C ; IF_C_AND_Z if C set and Z set 1000 IF_Z_AND_C ; IF_C_AND_NZ if C set and Z clear 0100 IF_NZ_AND_C ; IF_NC_AND_Z if C clear and Z set 0010 IF_Z_AND_NC ; IF_NC_AND_NZ if C clear and Z clear 0001 IF_A –and– IF_NZ_AND_NC ; IF_C_OR_Z if C set or Z set 1110 IF_BE –and– IF_Z_OR_C ; IF_C_OR_NZ if C set or Z clear 1101 IF_NZ_OR_C ; IF_NC_OR_Z if C clear or Z set 1011 IF_Z_OR_NC ; IF_NC_OR_NZ if C clear or Z clear 0111 IF_NZ_OR_NC ; IF_Z_EQ_C if Z equal to C 1001 IF_C_EQ_Z ; IF_Z_NE_C if Z not equal to C 0110 IF_C_NE_Z ; IF_Z_AND_C if Z set and C set 1000 IF_C_AND_Z ; IF_Z_AND_NC if Z set and C clear 0010 IF_NC_AND_Z ; IF_NZ_AND_C if Z clear and C set 0100 IF_C_AND_NZ ; IF_NZ_AND_NC if Z clear and C clear 0001 IF_A –and– IF_NC_AND_NZ ; IF_Z_OR_C if Z set or C set 1110 IF_BE –and– IF_C_OR_Z ; IF_Z_OR_NC if Z set or C clear 1011 IF_NC_OR_Z ; IF_NZ_OR_C if Z clear or C set 1101 IF_C_OR_NZ ; IF_NZ_OR_NC if Z clear or C clear 0111 IF_NC_OR_NZ ; P2 example.... ; orgh $12000 ; org ; ; rep @rblk1,#511 ; add myreg1,myreg2 wz ; if_z sub myreg1,myreg2 wc ; if_nc xor myreg1,myreg2 wz,wc ; rblk1 ; rep @rblk2,##512 '<-- Repeat block length +1 error ; add myreg1,myreg2 wz ; if_z sub myreg1,myreg2 wc ; if_nc xor myreg1,myreg2 wz,wc ; rblk2 ; mov myreg3,##512 ; rep @rblk3,myreg3 ; add myreg1,myreg2 wz ; if_z sub myreg1,myreg2 wc ; if_nc xor myreg1,myreg2 wz,wc ; rblk3 ; Here's is my disassembly of Pnut's output ; Propeller 2 - Disassembler V1.02 - Ozpropdev 2015 ; ------------------------------------------------- ; 12000: $FCDC05FF %1111_1100110_111_000000010_111111111 REP #$2,#INB ; 12004: $F10A0302 %1111_0001000_010_100000001_100000010 ADD $101,$102 WZ ; 12008: $A1920302 %1010_0001100_100_100000001_100000010 IF_Z SUB $101,$102 WC ; 1200C: $357A0302 %0011_0101011_110_100000001_100000010 IF_NC XOR $101,$102 WZ, WC ; 12010: $FF000001 %1111_1111000_000_000000000_000000001 AUGS #$1 (##200) ; 12014: $FCDC0600 %1111_1100110_111_000000011_000000000 REP #$3,#$0 '<-- should be REP #$2,@#0 ; 12018: $F10A0302 %1111_0001000_010_100000001_100000010 ADD $101,$102 WZ ; 1201C: $A1920302 %1010_0001100_100_100000001_100000010 IF_Z SUB $101,$102 WC ; 12020: $357A0302 %0011_0101011_110_100000001_100000010 IF_NC XOR $101,$102 WZ, WC ; 12024: $FF000001 %1111_1111000_000_000000000_000000001 AUGS #$1 (##200) ; 12028: $F6060600 %1111_0110000_001_100000011_000000000 MOV $103,#$0 ; 1202C: $FCD80503 %1111_1100110_110_000000010_100000011 REP #$2,$103 ; 12030: $F10A0302 %1111_0001000_010_100000001_100000010 ADD $101,$102 WZ ; 12034: $A1920302 %1010_0001100_100_100000001_100000010 IF_Z SUB $101,$102 WC ; 12038: $357A0302 %0011_0101011_110_100000001_100000010 IF_NC XOR $101,$102 WZ, WC ; ; Results XOR with prefix & suffix ; 00000034: 05 14 FC 6D IF_Z XOR 0AH,#05H WC ; 00000038: 05 14 FC 6E IF_Z XOR 0AH,#05H WZ ; 0000003C: 05 14 FC 6F IF_Z XOR 0AH,#05H WZ,WC ; 00000040: 05 14 FC 6F IF_Z XOR 0AH,#05H WC, WZ ; 00000044: 05 14 7C 6C IF_Z XOR 0AH,#05H NR ; 00000048: 05 14 FC 6C XOR 0AH,#05H ; 0000004C: 05 14 FC 6D XOR 0AH,#05H WC ; 00000050: 05 14 FC 6C IF_ALWAYS XOR 0AH,#05H ; 00000054: 05 14 FC 6E IF_ALWAYS XOR 0AH,#05H WZ ; 00000058: 05 14 FC 6F IF_ALWAYS XOR 0AH,#05H WZ, WC ; 0000005C: 05 14 7C 6F IF_ALWAYS XOR 0AH,#05H WZ, WC, NR ; 00000060: 00 00 80 00 dd (001b shl 23) ; 00000064: 00 00 80 02 dd (101b shl 23) ; 00000068: 00 00 80 03 dd (111b shl 23) ; 0000006C: 00 00 00 00 dd (000b shl 23) ; include 'hex.inc' ; comment to create Binary image - change MAKE.CMD if inactive. 1 pass, 9.6 seconds, 46482 bytes. wow...7910 lines in LST? ; No hex file if this is places last